High Gain Detector Techniques for Low Bandwidth Low Noise Phase-Locked Loops

    公开(公告)号:US20220224348A1

    公开(公告)日:2022-07-14

    申请号:US17461997

    申请日:2021-08-31

    Abstract: In described examples, a feedback loop has phase detection (PD) circuitry that has a reference input to receive a reference frequency signal, a feedback input to receive a feedback signal, and phase difference outputs. A phase to digital converter (P2DC) includes a first phase to charge converter (PCC) that has a gain polarity and a first phase error output; a second PCC that has an opposite gain polarity and a second phase error output. A differential loop filter has an amplifier with an inverting input coupled to the first phase error output and a non-inverting input coupled to the second phase error output. An analog to digital converter (ADC) has an input coupled to an output of the differential loop filter. A feedback path is coupled to the output of the P2DC, with an output of the feedback path providing the feedback signal to the PD feedback input.

    BAW oscillators with dual BAW temperature sensing

    公开(公告)号:US11601089B1

    公开(公告)日:2023-03-07

    申请号:US17463406

    申请日:2021-08-31

    Abstract: A temperature compensated oscillator circuit includes a first oscillator, a second oscillator, a first divider, a second divider, a frequency ratio circuit, and a temperature compensation circuit. The first divider is coupled to the first oscillator, and is configured to divide a frequency of a first oscillator signal generated by the first oscillator. The second divider is coupled to the second oscillator, and is configured to divide a frequency of a second oscillator signal generated by the second oscillator. The frequency ratio circuit is coupled to the first divider and the second divider, and is configured to determine a frequency ratio of an output of the first divider to an output of the second divider. The temperature compensation circuit is coupled to the frequency ratio circuit and the first oscillator, and is configured to generate a compensated frequency based on the frequency ratio and the first oscillator signal.

    High Gain Detector Techniques for High Bandwidth Low Noise Phase-Locked Loops

    公开(公告)号:US20220224343A1

    公开(公告)日:2022-07-14

    申请号:US17461996

    申请日:2021-08-31

    Abstract: In described examples, a phase locked loop (PLL) has a first phase detector cell (PD) that has a gain polarity. The first PD cell has a phase error output and inputs coupled to a reference frequency signal and a feedback signal. A second PD cell has an opposite gain polarity. The second PD cell has a phase error output and inputs coupled to the reference frequency signal and the feedback signal. A loop filter has a feedforward path and a (lossy) integrating path coupled to an output of the filter. The feedforward path has a third PD cell that has phase error output AC-coupled to the filter output. The integrating path includes an opamp that has an inverting input coupled to the first PD cell phase error output and a non-inverting input coupled to the second PD cell phase error output.

    Frequency multiplier calibration
    6.
    发明授权

    公开(公告)号:US12218672B2

    公开(公告)日:2025-02-04

    申请号:US18092091

    申请日:2022-12-30

    Abstract: In some examples, an apparatus includes a delay-based frequency multiplier and an error detection circuit. The delay-based frequency multiplier has a clock input, a multiplier clock output, and a delay calibration input. The error detection circuit has a detection input and a detection output. The detection input is coupled to the multiplier clock output, and the detection output is coupled to the delay calibration input. The error detection circuit is configured to receive a clock signal at the detection input, and provide a period error signal at the detection output based on a time difference between a first edge of the clock signal and a second edge of a delayed version of the clock signal.

    Multi-phase oscillators
    8.
    发明授权

    公开(公告)号:US12224708B2

    公开(公告)日:2025-02-11

    申请号:US17389935

    申请日:2021-07-30

    Abstract: An oscillator circuit includes a first BAW oscillator, a first coupling stage, a second BAW oscillator, and a second coupling stage. The first BAW oscillator is configured to generate a first output signal at a frequency. The first coupling stage is coupled to the first BAW oscillator, and is configured to amplify the first output signal. The second BAW oscillator is coupled to the first coupling stage, and is configured to generate a second output signal at the frequency. The second output signal differs in phase from the first output signal. The second coupling stage is coupled to the first BAW oscillator and the second BAW oscillator, and is configured to amplify the second output signal and drive the first BAW oscillator.

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