公开(公告)号：US20240355388A1

公开(公告)日：2024-10-24

申请号：US18758901

申请日：2024-06-28

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Yu-Der Chih ,  Jonathan Tsung-Yung Chang ,  Yun-Sheng Chen ,  Maybe Chen ,  Ya-Chin King ,  Wen Zhang Lin ,  Chrong Jung Lin ,  Hsin-Yuan Yu

IPC: G11C13/00 ,  H10B63/00 ,  H10N70/20

CPC classification number: G11C13/004 ,  G11C13/0069 ,  H10B63/30 ,  H10N70/253 ,  G11C2013/0045 ,  G11C2013/0078

Abstract: Disclosed herein are related to a memory cell including one or more programmable resistors and a control transistor. In one aspect, a programmable resistor includes a gate structure and one or more source/drain structures for forming a transistor. A resistance of the programmable resistor may be set by applying a voltage to the gate structure, while the control transistor is enabled. Data stored by the programmable resistor can be read by sensing current through the programmable resistor, while the control transistor is disabled. In one aspect, the one or more programmable resistors and the control transistor are implemented by same type of components, allowing the memory cell to be formed in a compact manner through a simplified the fabrication process.

公开(公告)号：US20240404611A1

公开(公告)日：2024-12-05

申请号：US18328091

申请日：2023-06-02

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd. ,  College of Semiconductor Research, National Tsing Hua University

Inventor： Chrong Jung Lin ,  Ya-Chin King ,  Li-Yu Wang

IPC: G11C17/16 ,  G11C17/18 ,  H10B20/25

Abstract: A The memory device includes a memory array comprising a plurality of one-time-programmable (OTP) memory cells. Each of the plurality of OTP memory cells comprises: a select transistor; a diode; and a conductor fuse. The diode and the conductor fuse are coupled in series, with the select transistor coupled to a common node between the diode and the conductor fuse.

公开(公告)号：US20220252989A1

公开(公告)日：2022-08-11

申请号：US17560039

申请日：2021-12-22

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Yu-Der Chih ,  May-Be Chen ,  Ya-Chin King ,  Chrong Jung Lin ,  Burn Jeng Lin ,  Bo Yu Lin

IPC: G03F7/20 ,  H01L21/66 ,  H01L21/027

Abstract: A semiconductor fabrication apparatus and a method of using the same are disclosed. In one aspect, the apparatus includes a holder configured to place a substrate and a radiation source configured to provide radiation to transfer a pattern onto the substrate. The apparatus also includes a plurality of sensing devices configured to provide a reference signal based on an intensity of the radiation when the substrate is not present. The apparatus further includes a controller, operatively coupled to the plurality of sensing devices, configured to adjust the intensity of the radiation based on the reference signal.

公开(公告)号：US20220068378A1

公开(公告)日：2022-03-03

申请号：US17337781

申请日：2021-06-03

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Yu-Der Chih ,  Maybe Chen ,  Yun-Sheng Chen ,  Wen Zhang Lin ,  Jonathan Tsung-Yung Chang ,  Chrong Jung Lin ,  Ya-Chin King ,  Hsin-Yuan Yu

IPC: G11C13/00 ,  H01L27/24 ,  H01L45/00

Abstract: Disclosed herein are related to a memory cell including one or more programmable resistors and a control transistor. In one aspect, a programmable resistor includes a gate structure and one or more source/drain structures for forming a transistor. A resistance of the programmable resistor may be set by applying a voltage to the gate structure, while the control transistor is enabled. Data stored by the programmable resistor can be read by sensing current through the programmable resistor, while the control transistor is disabled. In one aspect, the one or more programmable resistors and the control transistor are implemented by same type of components, allowing the memory cell to be formed in a compact manner through a simplified the fabrication process.

公开(公告)号：US12211949B2

公开(公告)日：2025-01-28

申请号：US18486114

申请日：2023-10-12

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. ,  NATIONAL TSING HUA UNIVERSITY

Inventor： Ya-Chin King ,  Chrong Jung Lin ,  Burn Jeng Lin ,  Shi-Jiun Wang

IPC: H01L31/119 ,  H01L31/0224

Abstract: A device includes an active region, an isolation structure, a gate structure, an interlayer dielectric (ILD) layer, a reading contact, and a sensing contact. The isolation structure laterally surrounds the active region. The gate structure is across the active region. The ILD layer laterally surrounds the gate structure. The reading contact is in contact with the isolation structure and is separated from the gate structure by a first portion of the ILD layer. The sensing contact is in contact with the isolation structure and is separated from the gate structure by a second portion of the ILD layer.

公开(公告)号：US11943936B2

公开(公告)日：2024-03-26

申请号：US17400615

申请日：2021-08-12

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

Inventor： Yu-Der Chih ,  May-Be Chen ,  Yun-Sheng Chen ,  Jonathan Tsung-Yung Chang ,  Wen Zhang Lin ,  Chrong Jung Lin ,  Ya-Chin King ,  Chieh Lee ,  Wang-Yi Lee

IPC: H10B63/00 ,  H01L29/40 ,  H01L29/78

CPC classification number: H10B63/30 ,  H01L29/401 ,  H01L29/785

Abstract: A semiconductor device and a method of manufacturing the same are provided. The semiconductor device includes a first transistor, a first resistive random access memory (RRAM) resistor, and a second RRAM resistor. The first resistor includes a first resistive material layer, a first electrode shared by the second resistor, and a second electrode. The second resistor includes the first electrode, a second resistive material layer, and a third electrode. The first electrode is electrically coupled to the first transistor.

公开(公告)号：US11824133B2

公开(公告)日：2023-11-21

申请号：US17670309

申请日：2022-02-11

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. ,  NATIONAL TSING HUA UNIVERSITY

Inventor： Ya-Chin King ,  Chrong Jung Lin ,  Burn Jeng Lin ,  Shi-Jiun Wang

IPC: H01L31/119 ,  H01L31/0224

CPC classification number: H01L31/119 ,  H01L31/022408

Abstract: A device includes a semiconductor fin, an isolation structure, a gate structure, source/drain structures, a sensing contact, a sensing pad structure, and a reading contact. The semiconductor fin includes a channel region and source/drain regions on opposite sides of the channel region. The isolation structure laterally surrounds the semiconductor fin. The gate structure is over the channel region of the semiconductor fin. The source/drain structures are respectively over the source/drain regions of the semiconductor fin. The sensing contact is directly on the isolation structure and adjacent to the gate structure. The sensing pad structure is connected to the sensing contact. The reading contact is directly on the isolation structure and adjacent to the gate structure.

公开(公告)号：US12249662B2

公开(公告)日：2025-03-11

申请号：US17749382

申请日：2022-05-20

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. ,  NATIONAL TSING HUA UNIVERSITY

Inventor： Ya-Chin King ,  Chrong Jung Lin ,  Burn Jeng Lin ,  Shi-Jiun Wang

IPC: H01L31/02 ,  H01J37/244 ,  H01L31/18

Abstract: A device includes a detector, a sensing pad, a ring structure, a control circuit, a first transistor, and a second transistor. The sensing pad is electrically connected to the detector. The ring structure is over the sensing pad and includes an upper conductive ring and a lower conductive ring between the upper conductive ring and the sensing pad. The first transistor interconnects the upper conductive ring and the control circuit. The second transistor interconnects the lower conductive ring and the control circuit.

公开(公告)号：US12051466B2

公开(公告)日：2024-07-30

申请号：US18301745

申请日：2023-04-17

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Yu-Der Chih ,  Jonathan Tsung-Yung Chang ,  Yun-Sheng Chen ,  Maybe Chen ,  Ya-chin King ,  Wen Zhang Lin ,  Chrong Jung Lin ,  Hsin-Yuan Yu

IPC: G11C11/00 ,  G11C13/00 ,  H10B63/00 ,  H10N70/20

CPC classification number: G11C13/004 ,  G11C13/0069 ,  H10B63/30 ,  H10N70/253 ,  G11C2013/0045 ,  G11C2013/0078

Abstract: Disclosed herein are related to a memory cell including one or more programmable resistors and a control transistor. In one aspect, a programmable resistor includes a gate structure and one or more source/drain structures for forming a transistor. A resistance of the programmable resistor may be set by applying a voltage to the gate structure, while the control transistor is enabled. Data stored by the programmable resistor can be read by sensing current through the programmable resistor, while the control transistor is disabled. In one aspect, the one or more programmable resistors and the control transistor are implemented by same type of components, allowing the memory cell to be formed in a compact manner through a simplified the fabrication process.

公开(公告)号：US11646079B2

公开(公告)日：2023-05-09

申请号：US17337781

申请日：2021-06-03

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Yu-Der Chih ,  Maybe Chen ,  Yun-Sheng Chen ,  Wen Zhang Lin ,  Jonathan Tsung-Yung Chang ,  Chrong Jung Lin ,  Ya-Chin King ,  Hsin-Yuan Yu

IPC: G11C11/00 ,  G11C13/00 ,  H01L45/00 ,  H01L27/24

CPC classification number: G11C13/004 ,  G11C13/0069 ,  H01L27/2436 ,  H01L45/1206 ,  G11C2013/0045 ,  G11C2013/0078

Abstract: Disclosed herein are related to a memory cell including one or more programmable resistors and a control transistor. In one aspect, a programmable resistor includes a gate structure and one or more source/drain structures for forming a transistor. A resistance of the programmable resistor may be set by applying a voltage to the gate structure, while the control transistor is enabled. Data stored by the programmable resistor can be read by sensing current through the programmable resistor, while the control transistor is disabled. In one aspect, the one or more programmable resistors and the control transistor are implemented by same type of components, allowing the memory cell to be formed in a compact manner through a simplified the fabrication process.