公开(公告)号：US20150021755A1

公开(公告)日：2015-01-22

申请号：US14511051

申请日：2014-10-09

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor： Yi-Li HSIAO ,  Li-Yen LIN ,  Chih-Hang TUNG

IPC: H01L25/065 ,  H01L25/00 ,  H01L23/44 ,  H01L23/473 ,  H01L23/00 ,  H01L23/053

CPC classification number: H01L25/0657 ,  F28D15/02 ,  H01L23/053 ,  H01L23/3185 ,  H01L23/34 ,  H01L23/473 ,  H01L24/16 ,  H01L24/17 ,  H01L24/81 ,  H01L25/16 ,  H01L25/50 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/16227 ,  H01L2224/17181 ,  H01L2224/17183 ,  H01L2224/175 ,  H01L2224/17515 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06589 ,  H01L2924/01029 ,  H01L2924/0715 ,  H01L2924/1433 ,  H01L2924/1434 ,  H01L2924/1461 ,  H01L2924/15788 ,  H01L2924/00 ,  H01L2924/014

Abstract: A stacked package includes a substrate, and a first structure bonded to the substrate. The first structure has a plurality of bumps, and a first hydrophilic coating is on sidewalls of the first structure. The stacked package further includes a second structure bonded to the plurality of bumps. The first hydrophilic coating is on sidewalls of the second structure. The first structure is between the second structure and the substrate. The stacked package further includes a housing, wherein the housing defines a volume enclosing the first structure and the second structure. A second hydrophilic coating is on sidewalls of an inner surface of the housing. The stacked package further includes a cooling fluid within the volume enclosing the first structure and the second structure. A top surface of the cooling fluid is above a top surface of the second structure.

Abstract translation: 堆叠的封装包括衬底和结合到衬底的第一结构。 第一结构具有多个凸块，第一亲水涂层位于第一结构的侧壁上。 堆叠的封装还包括结合到多个凸块的第二结构。 第一亲水涂层位于第二结构的侧壁上。 第一结构在第二结构和衬底之间。 堆叠的包装还包括壳体，其中壳体限定包围第一结构和第二结构的体积。 第二亲水涂层位于壳体内表面的侧壁上。 堆叠的包装还包括在包围第一结构和第二结构的体积内的冷却流体。 冷却流体的顶表面在第二结构的顶表面之上。

公开(公告)号：US20180108632A1

公开(公告)日：2018-04-19

申请号：US15837403

申请日：2017-12-11

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor： Su-Chun YANG ,  Yi-Li HSIAO ,  Chih-Hang TUNG ,  Chen-Hua YU

IPC: H01L23/00 ,  B23K1/00

CPC classification number: H01L24/11 ,  B23K1/0016 ,  H01L21/78 ,  H01L24/13 ,  H01L24/16 ,  H01L24/742 ,  H01L24/75 ,  H01L24/81 ,  H01L24/94 ,  H01L24/97 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1134 ,  H01L2224/1145 ,  H01L2224/11462 ,  H01L2224/1183 ,  H01L2224/1184 ,  H01L2224/11848 ,  H01L2224/13014 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/16057 ,  H01L2224/16058 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16506 ,  H01L2224/16507 ,  H01L2224/75252 ,  H01L2224/75317 ,  H01L2224/75501 ,  H01L2224/75502 ,  H01L2224/75744 ,  H01L2224/75745 ,  H01L2224/75843 ,  H01L2224/7598 ,  H01L2224/81121 ,  H01L2224/81191 ,  H01L2224/81815 ,  H01L2224/8193 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2924/00013 ,  H01L2924/01322 ,  H01L2924/12042 ,  H01L2224/81 ,  H01L2924/00

Abstract: A wafer-level pulling method includes securing a top holder to a plurality of chips. The method further includes securing a bottom holder to a wafer, wherein the plurality of chips are bonded to the wafer by a plurality of solder bumps. The method further includes softening the plurality of solder bumps. The method further includes stretching the plurality of softened solder bumps, wherein stretching the plurality of softened solder bumps comprises leveling the plurality of chips using a plurality of levelling devices separated from the plurality of chips, and a first levelling device of the plurality of levelling devices has a different structure from a second levelling device of the plurality of levelling devices.

公开(公告)号：US20150079763A1

公开(公告)日：2015-03-19

申请号：US14554354

申请日：2014-11-26

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor： Su-Chun YANG ,  Yi-Li HSIAO ,  Chih-Hang TUNG ,  Chen-Hua YU

IPC: H01L23/00 ,  H01L21/78

CPC classification number: H01L24/11 ,  B23K1/0016 ,  H01L21/78 ,  H01L24/13 ,  H01L24/16 ,  H01L24/742 ,  H01L24/75 ,  H01L24/81 ,  H01L24/94 ,  H01L24/97 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1134 ,  H01L2224/1145 ,  H01L2224/11462 ,  H01L2224/1183 ,  H01L2224/1184 ,  H01L2224/11848 ,  H01L2224/13014 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/16057 ,  H01L2224/16058 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16506 ,  H01L2224/16507 ,  H01L2224/75252 ,  H01L2224/75317 ,  H01L2224/75501 ,  H01L2224/75502 ,  H01L2224/75744 ,  H01L2224/75745 ,  H01L2224/75843 ,  H01L2224/7598 ,  H01L2224/81121 ,  H01L2224/81191 ,  H01L2224/81815 ,  H01L2224/8193 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2924/00013 ,  H01L2924/01322 ,  H01L2924/12042 ,  H01L2224/81 ,  H01L2924/00

Abstract: A wafer-level pulling method includes securing a top holder to a plurality of chips; and securing a bottom holder to a wafer, wherein the plurality of chips are bonded to the wafer by a plurality of solder bumps. The wafer-level pulling method further includes softening the plurality of solder bumps; and stretching the plurality of softened solder bumps.

Abstract translation: 晶圆级牵引方法包括将顶部保持器固定到多个芯片; 以及将底部保持器固定到晶片上，其中所述多个芯片通过多个焊料凸块接合到所述晶片。 晶片级牵引方法还包括软化多个焊料凸块; 并且拉伸多个软化的焊料凸块。

公开(公告)号：US20170012019A1

公开(公告)日：2017-01-12

申请号：US15276196

申请日：2016-09-26

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor： Su-Chun YANG ,  Chung-Jung WU ,  Hsiao-Yun CHEN ,  Yi-Li HSIAO ,  Chih-Hang TUNG ,  Da-Yuan SHIH ,  Chen-Hua YU

IPC: H01L23/00 ,  C22C13/00 ,  B23K35/26 ,  B23K1/00 ,  B23K35/02

CPC classification number: H01L24/81 ,  B23K1/0016 ,  B23K35/0244 ,  B23K35/262 ,  B23K2101/40 ,  B23K2103/08 ,  C22C13/00 ,  H01L23/49811 ,  H01L24/13 ,  H01L24/16 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1134 ,  H01L2224/1145 ,  H01L2224/11462 ,  H01L2224/13014 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13118 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16057 ,  H01L2224/16058 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16506 ,  H01L2224/16507 ,  H01L2224/81121 ,  H01L2224/81191 ,  H01L2224/81815 ,  H01L2224/8193 ,  H01L2224/81947 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/3841

Abstract: A method of producing a solder bump joint includes heating a solder bump comprising tin above a melting temperature of the solder bump, wherein the solder bumps comprises eutectic Sn—Bi compound, and the eutectic Sn-Bi compound is free of Ag. The method further includes stretching the solder bump to increase a height of the solder bump, wherein stretching the solder bump forms lamellar structures having a contact angle of less than 90°. The method further includes cooling down the solder bump.

Abstract translation: 一种制造焊料凸点接头的方法包括将包含锡的焊料凸点加热到焊锡凸块的熔化温度以上，其中焊料凸块包括共晶Sn-Bi化合物，并且共晶Sn-Bi化合物不含Ag。 该方法还包括拉伸焊料凸起以增加焊料凸块的高度，其中拉伸焊料凸点形成具有小于90°的接触角的层状结构。 该方法还包括冷却焊料凸块。