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公开(公告)号：US20170330939A1
公开(公告)日：2017-11-16
申请号：US15665184
申请日：2017-07-31
发明人： Cheng-Hung Chang , Chen-Hua Yu , Chen-Nan Yeh
IPC分类号： H01L29/10 , H01L29/78 , H01L29/06 , H01L27/12 , H01L27/088 , H01L21/8234
CPC分类号： H01L29/1083 , H01L21/823412 , H01L21/823431 , H01L21/823481 , H01L27/088 , H01L27/1203 , H01L27/1207 , H01L29/0653 , H01L29/7843 , H01L29/7851
摘要： A semiconductor structure includes a semiconductor substrate; a planar transistor on a first portion of the semiconductor substrate, wherein the first portion of the semiconductor substrate has a first top surface; and a multiple-gate transistor on a second portion of the semiconductor substrate. The second portion of the semiconductor substrate is recessed from the first top surface to form a fin of the multiple-gate transistor. The fin is electrically isolated from the semiconductor substrate by an insulator.
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2.发明授权公开(公告)号：US08575725B2
公开(公告)日：2013-11-05
申请号：US13799760
申请日：2013-03-13
发明人： Chen-Hua Yu , Cheng-Hung Chang , Ebin Liao , Chia-Lin Yu , Hsiang-Yi Wang , Chun Hua Chang , Li-Hsien Huang , Darryl Kuo , Tsang-Jiuh Wu , Wen-Chih Chiou
CPC分类号： H01L21/76898 , H01L21/02271 , H01L21/02274 , H01L21/30625 , H01L21/31053 , H01L21/3212 , H01L21/76831 , H01L21/76832 , H01L21/76844 , H01L21/76846 , H01L23/481 , H01L23/49827 , H01L2225/06541 , H01L2225/06544 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor component includes a semiconductor substrate having a top surface. An opening extends from the top surface into the semiconductor substrate. The opening includes an interior surface. A first dielectric liner having a first compressive stress is disposed on the interior surface of the opening. A second dielectric liner having a tensile stress is disposed on the first dielectric liner. A third dielectric liner having a second compressive stress disposed on the second dielectric liner. A metal barrier layer is disposed on the third dielectric liner. A conductive material is disposed on the metal barrier layer and fills the opening.
摘要翻译： 半导体部件包括具有顶面的半导体基板。 开口从顶表面延伸到半导体衬底中。 开口包括内表面。 具有第一压缩应力的第一电介质衬垫设置在开口的内表面上。 具有拉伸应力的第二电介质衬垫设置在第一电介质衬垫上。 具有设置在第二电介质衬垫上的第二压缩应力的第三绝缘衬垫。 金属阻挡层设置在第三电介质衬垫上。 导电材料设置在金属阻挡层上并填充开口。
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公开(公告)号：US10784162B2
公开(公告)日：2020-09-22
申请号：US16168306
申请日：2018-10-23
发明人： Chen-Hua Yu , Cheng-Hung Chang , Ebin Liao , Chia-Lin Yu , Hsiang-Yi Wang , Chun Hua Chang , Li-Hsien Huang , Darryl Kuo , Tsang-Jiuh Wu , Wen-Chih Chiou
IPC分类号： H01L21/768 , H01L23/48 , H01L23/498 , H01L21/02 , H01L21/306 , H01L21/3105 , H01L21/321 , H01L25/065 , H01L25/11 , H01L23/538 , H01L25/04 , H01L25/07 , H01L25/075
摘要： A method of making a semiconductor component includes etching a substrate to define an opening. The method further includes depositing a first dielectric liner in the opening, wherein the first dielectric liner has a first stress. The method further includes depositing a second dielectric liner over the first dielectric liner, wherein the second dielectric liner has a second stress, and a direction of the first stress is opposite a direction of the second stress. The method further includes depositing a conductive material over the second dielectric liner.
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4.发明申请公开(公告)号：US20180226506A1
公开(公告)日：2018-08-09
申请号：US15942639
申请日：2018-04-02
发明人： Cheng-Hung Chang , Yu-Rung Hsu , Chen-Hua Yu
IPC分类号： H01L29/78 , H01L29/66 , H01L21/8238 , H01L21/84 , H01L27/12 , H01L29/06 , H01L29/788 , H01L29/792
CPC分类号： H01L29/7833 , H01L21/76224 , H01L21/76264 , H01L21/823878 , H01L21/84 , H01L27/1203 , H01L27/1207 , H01L29/0653 , H01L29/6653 , H01L29/6659 , H01L29/66636 , H01L29/7881 , H01L29/792
摘要： Semiconductor devices with low junction capacitances and methods of fabrication thereof are described. In one embodiment, a method of forming a semiconductor device includes forming isolation regions in a substrate to form active areas. The sidewalls of the active areas are enclosed by the isolation regions. The isolation regions are recessed to expose first parts of the sidewalls of the active areas. The first parts of the sidewalls of the active areas are covered with spacers. The isolation regions are etched to expose second parts of the sidewalls of the active area, the second parts being disposed below the first parts. The active areas are etched through the exposed second parts of the sidewalls to form lateral openings. The lateral openings are filled with a spin on dielectric.
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公开(公告)号：US20160133703A1
公开(公告)日：2016-05-12
申请号：US14988427
申请日：2016-01-05
发明人： Cheng-Hung Chang , Chen-Hua Yu , Chen-Nan Yeh
CPC分类号： H01L29/1083 , H01L21/823412 , H01L21/823431 , H01L21/823481 , H01L27/088 , H01L27/1203 , H01L27/1207 , H01L29/0653 , H01L29/7843 , H01L29/7851
摘要： A semiconductor structure includes a semiconductor substrate; a planar transistor on a first portion of the semiconductor substrate, wherein the first portion of the semiconductor substrate has a first top surface; and a multiple-gate transistor on a second portion of the semiconductor substrate. The second portion of the semiconductor substrate is recessed from the first top surface to form a fin of the multiple-gate transistor. The fin is electrically isolated from the semiconductor substrate by an insulator.
摘要翻译： 半导体结构包括半导体衬底; 在所述半导体衬底的第一部分上的平面晶体管，其中所述半导体衬底的所述第一部分具有第一顶表面; 以及在半导体衬底的第二部分上的多栅极晶体管。 半导体衬底的第二部分从第一顶表面凹入以形成多栅晶体管的鳍。 翅片通过绝缘体与半导体衬底电隔离。
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公开(公告)号：US11545392B2
公开(公告)日：2023-01-03
申请号：US17021600
申请日：2020-09-15
发明人： Chen-Hua Yu , Cheng-Hung Chang , Ebin Liao , Chia-Lin Yu , Hsiang-Yi Wang , Chun Hua Chang , Li-Hsien Huang , Darryl Kuo , Tsang-Jiuh Wu , Wen-Chih Chiou
IPC分类号： H01L21/768 , H01L23/48 , H01L23/498 , H01L21/02 , H01L21/306 , H01L21/3105 , H01L21/321 , H01L25/065 , H01L25/11 , H01L23/538 , H01L25/04 , H01L25/07 , H01L25/075
摘要： A semiconductor component includes a substrate having an opening. The semiconductor component further includes a first dielectric liner in the opening, wherein the first dielectric liner having a thickness T1 at a first end of the opening, and a thickness T2 at a second end of the opening, and R1 is a ratio of T1 to T2. The semiconductor component further includes a second dielectric liner over the first dielectric liner, wherein the second dielectric liner having a thickness T3 at the first end of the opening, a thickness T4 at the second end of the opening, R2 is a ratio of T3 to T4, and R1 is greater than R2.
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公开(公告)号：US10312327B2
公开(公告)日：2019-06-04
申请号：US15665184
申请日：2017-07-31
发明人： Cheng-Hung Chang , Chen-Hua Yu , Chen-Nan Yeh
IPC分类号： H01L21/00 , H01L29/10 , H01L21/8234 , H01L27/088 , H01L27/12 , H01L29/78 , H01L29/06
摘要： A semiconductor structure includes a semiconductor substrate; a planar transistor on a first portion of the semiconductor substrate, wherein the first portion of the semiconductor substrate has a first top surface; and a multiple-gate transistor on a second portion of the semiconductor substrate. The second portion of the semiconductor substrate is recessed from the first top surface to form a fin of the multiple-gate transistor. The fin is electrically isolated from the semiconductor substrate by an insulator.
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公开(公告)号：US09735042B2
公开(公告)日：2017-08-15
申请号：US14725088
申请日：2015-05-29
发明人： Shih-Ting Hung , Cheng-Hung Chang , Chen-Yi Lee , Chen-Nan Yeh , Chen-Hua Yu
IPC分类号： H01L21/8232 , H01L21/762 , H01L29/66 , H01L29/78 , H01L21/8234 , H01L29/10
CPC分类号： H01L21/76202 , H01L21/823431 , H01L21/823481 , H01L29/1083 , H01L29/66795 , H01L29/785
摘要： A semiconductor structure includes a semiconductor substrate having a first portion and a second portion. A first Fin field-effect transistor (FinFET) is formed over the first portion of the semiconductor substrate, wherein the first FinFET includes a first fin having a first fin height. A second FinFET is formed over the second portion of the semiconductor substrate, wherein the second FinFET includes a second fin having a second fin height different from the first fin height. A top surface of the first fin is substantially level with a top surface of the second fin. A punch-through stopper is underlying and adjoining the first FinFET, wherein the punch-through stopper isolates the first fin from the first portion of the semiconductor substrate.
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公开(公告)号：US20190288070A1
公开(公告)日：2019-09-19
申请号：US16430151
申请日：2019-06-03
发明人： Cheng-Hung Chang , Chen-Hua Yu , Chen-Nan Yeh
IPC分类号： H01L29/10 , H01L29/78 , H01L29/06 , H01L27/12 , H01L21/8234 , H01L27/088
摘要： A semiconductor structure includes a semiconductor substrate; a planar transistor on a first portion of the semiconductor substrate, wherein the first portion of the semiconductor substrate has a first top surface; and a multiple-gate transistor on a second portion of the semiconductor substrate. The second portion of the semiconductor substrate is recessed from the first top surface to form a fin of the multiple-gate transistor. The fin is electrically isolated from the semiconductor substrate by an insulator.
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公开(公告)号：US10115634B2
公开(公告)日：2018-10-30
申请号：US15214776
申请日：2016-07-20
发明人： Chen-Hua Yu , Cheng-Hung Chang , Ebin Liao , Chia-Lin Yu , Hsiang-Yi Wang , Chun Hua Chang , Li-Hsien Huang , Darryl Kuo , Tsang-Jiuh Wu , Wen-Chih Chiou
IPC分类号： H01L21/768 , H01L23/48 , H01L23/498 , H01L21/02 , H01L21/306 , H01L21/3105 , H01L21/321
摘要： A semiconductor component includes a semiconductor substrate having an opening A first dielectric liner having a first compressive stress is disposed in the opening. A second dielectric liner having a tensile stress is disposed on the first dielectric liner. A third dielectric liner having a second compressive stress disposed on the second dielectric liner.
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