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公开(公告)号：US11527869B2
公开(公告)日：2022-12-13
申请号：US17023523
申请日：2020-09-17
发明人： Ryosuke Kubota
IPC分类号： H01S5/42 , H01S5/02253 , H01S5/02216 , H01S5/183 , H01S5/042 , H01S5/343 , H01S5/02 , H01S5/40
摘要： A light-emitting module includes a substrate, a first surface-emitting laser mounted on the substrate, the first surface-emitting laser having a first engaging portion protruded outward at an end, and a second surface-emitting laser mounted on the substrate, the second surface-emitting laser having a second engaging portion recessed inward at an end. The first surface-emitting laser and the second surface-emitting laser are adjacent to each other. The first engaging portion and the second engaging portion are engaged with each other.
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公开(公告)号：US09966249B2
公开(公告)日：2018-05-08
申请号：US15024110
申请日：2014-08-11
发明人： So Tanaka , Kyoko Okita , Taro Nishiguchi , Ryosuke Kubota , Kenji Kanbara
IPC分类号： C30B25/18 , C30B33/00 , C30B29/36 , H01L29/04 , H01L29/16 , H01L21/02 , C30B23/00 , H01L29/06
CPC分类号： H01L21/02021 , C30B23/00 , C30B25/186 , C30B29/36 , C30B33/00 , H01L21/02378 , H01L21/02433 , H01L21/02529 , H01L29/045 , H01L29/0657 , H01L29/1608
摘要： A silicon carbide semiconductor substrate includes a first main surface and a second main surface opposite to the first main surface. The first main surface has a maximum diameter of more than 100 mm, and the silicon carbide semiconductor substrate has a thickness of not more than 700 μm. A dislocation density is not more than 500/mm2 at an arbitrary region having an area of 1 mm2 in a region within 5 mm from an outer circumferential end portion of the first main surface toward a center of the first main surface. Accordingly, there is provided a silicon carbide semiconductor substrate allowing for suppression of generation of cracks.
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公开(公告)号：US20160204000A1
公开(公告)日：2016-07-14
申请号：US14912509
申请日：2014-07-08
发明人： Ryosuke Kubota , So Tanaka
IPC分类号： H01L21/324 , H01L21/225 , H01L21/683 , H01L21/02
CPC分类号： H01L21/324 , H01L21/02529 , H01L21/0415 , H01L21/046 , H01L21/2253 , H01L21/265 , H01L21/26546 , H01L21/67248 , H01L21/6831 , H01L21/6833
摘要： A method for manufacturing a semiconductor device in accordance with the present invention includes the steps of preparing a semiconductor substrate, placing the semiconductor substrate on an electrostatic chuck, chucking the semiconductor substrate after raising a temperature of the electrostatic chuck to a first temperature, raising a temperature of the electrostatic chuck to a second temperature which is higher than the above-described first temperature in a state where the semiconductor substrate is chucked, and performing a treatment to the semiconductor substrate in a state where a temperature of the electrostatic chuck is maintained at the above-described second temperature.
摘要翻译： 根据本发明的制造半导体器件的方法包括以下步骤：制备半导体衬底，将半导体衬底放置在静电吸盘上，在将静电吸盘的温度升高到第一温度之后夹持半导体衬底， 在将半导体基板夹持的状态下将静电卡盘的温度设定为高于上述第一温度的第二温度，并且在保持静电卡盘的温度的状态下对该半导体基板进行处理 上述第二温度。
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4.发明申请公开(公告)号：US20160181373A1
公开(公告)日：2016-06-23
申请号：US14908846
申请日：2014-06-13
发明人： Takeyoshi Masuda , Taku Horii , Ryosuke Kubota
IPC分类号： H01L29/16 , H01L29/08 , H01L29/739 , H01L21/04 , H01L29/78 , H01L29/66 , H01L29/10 , H01L21/02
CPC分类号： H01L29/1608 , H01L21/02529 , H01L21/0465 , H01L29/086 , H01L29/0865 , H01L29/0869 , H01L29/0878 , H01L29/0886 , H01L29/1095 , H01L29/66068 , H01L29/66333 , H01L29/66712 , H01L29/7395 , H01L29/7802
摘要： A silicon carbide semiconductor device includes a silicon carbide layer and a gate insulating layer. The silicon carbide layer has a main surface. The gate insulating layer is arranged as being in contact with the main surface of the silicon carbide layer. The silicon carbide layer includes a drift region having a first conductivity type, a body region having a second conductivity type different from the first conductivity type and being in contact with the drift region, a source region having the first conductivity type and arranged as being spaced apart from the drift region by the body region, and a protruding region arranged to protrude from at least one side of the source region and the drift region into the body region, being in contact with the gate insulating layer, and having the first conductivity type.
摘要翻译： 碳化硅半导体器件包括碳化硅层和栅极绝缘层。 碳化硅层具有主表面。 栅极绝缘层被布置为与碳化硅层的主表面接触。 碳化硅层包括具有第一导电类型的漂移区域，具有不同于第一导电类型并与漂移区域接触的第二导电类型的主体区域，具有第一导电类型并且布置成间隔开的源极区域 除了身体区域的漂移区域之外，还设置有从源极区域和漂移区域的至少一侧突出到体区的突出区域，与栅极绝缘层接触并具有第一导电型 。
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公开(公告)号：US09263527B2
公开(公告)日：2016-02-16
申请号：US14550402
申请日：2014-11-21
发明人： Shunsuke Yamada , So Tanaka , Ryosuke Kubota , Taku Horii
CPC分类号： H01L29/1608 , H01L21/046 , H01L21/0475 , H01L21/0485 , H01L21/30604 , H01L29/086 , H01L29/1095 , H01L29/41766 , H01L29/45 , H01L29/66068 , H01L29/66712 , H01L29/66727 , H01L29/66734 , H01L29/78 , H01L29/7802 , H01L29/7813
摘要： A first impurity region is formed by ion implantation of a first impurity into a first main surface of a silicon carbide substrate. A metal layer is formed in contact with the first impurity region. By annealing the silicon carbide substrate and the metal layer, an electrode is formed. The metal layer is formed such that a concentration of a first impurity at a boundary portion between the metal layer and the first impurity region becomes less than a maximum value of a concentration of the first impurity in the first impurity region. The electrode is formed such that a concentration of the first impurity at a boundary portion between the electrode and the first impurity region becomes not less than 80% of a maximum value of a concentration of the first impurity in the first impurity region in a normal direction.
摘要翻译： 通过将第一杂质离子注入到碳化硅衬底的第一主表面中形成第一杂质区。 形成与第一杂质区接触的金属层。 通过退火碳化硅衬底和金属层，形成电极。 金属层形成为使得金属层和第一杂质区域之间的边界部分处的第一杂质的浓度变得小于第一杂质区域中的第一杂质的浓度的最大值。 电极形成为使得电极和第一杂质区域之间的边界部分处的第一杂质的浓度不小于在正常方向上的第一杂质区域中的第一杂质的浓度的最大值的80％ 。
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公开(公告)号：US12107382B2
公开(公告)日：2024-10-01
申请号：US17493348
申请日：2021-10-04
发明人： Ryosuke Kubota
CPC分类号： H01S5/0201 , H01S5/0042 , H01S5/183
摘要： An array device manufacturing method includes the steps of forming a plurality of optical elements on a wafer; inspecting the plurality of optical elements; defining dicing lines on the basis of a result of the inspection such that an array device composed entirely of one or more non-defective ones of the plurality of optical elements is obtained, the one or more non-defective ones being determined to be non-defective in the inspection; and forming the array device by dicing the wafer along the dicing lines.
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公开(公告)号：US10340344B2
公开(公告)日：2019-07-02
申请号：US15870289
申请日：2018-01-12
发明人： Ryosuke Kubota , Shunsuke Yamada , Taku Horii , Takeyoshi Masuda , Daisuke Hamajima , So Tanaka , Shinji Kimura , Masayuki Kobayashi
IPC分类号： H01L29/16 , H01L21/66 , H01L21/04 , H01L29/66 , H01L29/78 , H01L21/28 , H01L29/423 , H01L29/49 , H01L29/12 , G01R31/28 , H01L21/321 , H01L21/324 , H01L21/326 , H01L29/45 , H01L29/51 , G01R31/26
摘要： A silicon carbide semiconductor device includes a silicon carbide substrate, a gate insulating film, and a gate electrode. The gate insulating film is provided as being in contact with the first main surface of the silicon carbide substrate. The gate electrode is provided on the gate insulating film such that the gate insulating film lies between the gate electrode and the silicon carbide substrate. In a first stress test in which a gate voltage of −5 V is applied to the gate electrode for 100 hours at a temperature of 175° C., an absolute value of a difference between a first threshold voltage and a second threshold voltage is not more than 0.5 V, with a threshold voltage before the first stress test being defined as the first threshold voltage and a threshold voltage after the first stress test being defined as the second threshold voltage.
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公开(公告)号：US09786741B2
公开(公告)日：2017-10-10
申请号：US14908846
申请日：2014-06-13
发明人： Takeyoshi Masuda , Taku Horii , Ryosuke Kubota
IPC分类号： H01L29/15 , H01L31/0312 , H01L29/16 , H01L29/78 , H01L29/66 , H01L29/739 , H01L29/08 , H01L21/02 , H01L21/04 , H01L29/10
CPC分类号： H01L29/1608 , H01L21/02529 , H01L21/0465 , H01L29/086 , H01L29/0865 , H01L29/0869 , H01L29/0878 , H01L29/0886 , H01L29/1095 , H01L29/66068 , H01L29/66333 , H01L29/66712 , H01L29/7395 , H01L29/7802
摘要： A silicon carbide semiconductor device includes a silicon carbide layer and a gate insulating layer. The silicon carbide layer has a main surface. The gate insulating layer is arranged as being in contact with the main surface of the silicon carbide layer. The silicon carbide layer includes a drift region having a first conductivity type, a body region having a second conductivity type different from the first conductivity type and being in contact with the drift region, a source region having the first conductivity type and arranged as being spaced apart from the drift region by the body region, and a protruding region arranged to protrude from at least one side of the source region and the drift region into the body region, being in contact with the gate insulating layer, and having the first conductivity type.
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公开(公告)号：US20170154953A1
公开(公告)日：2017-06-01
申请号：US15320220
申请日：2015-05-08
发明人： Keiji Wada , Ryosuke Kubota , Toru Hiyoshi
IPC分类号： H01L29/06 , H01L21/265 , H01L21/02 , H01L29/16
CPC分类号： H01L29/063 , H01L21/02529 , H01L21/046 , H01L21/26513 , H01L29/06 , H01L29/0619 , H01L29/12 , H01L29/1608 , H01L29/36 , H01L29/872
摘要： A silicon carbide semiconductor device includes an impurity region including a p type impurity and disposed within a silicon carbide layer to surround an element region as seen in plan view. The impurity region has a peak concentration of the p type impurity at a position within the silicon carbide layer distant from a first main surface. The peak concentration is not less than 1×1016 cm−3 and not more than 5×1017 cm−3. The impurity region is formed by implanting ions of the p type impurity into the silicon carbide layer. Then, a silicon dioxide film is formed to cover the first main surface of the silicon carbide layer by performing a thermal oxidation process on the silicon carbide layer, and the concentration of the p type impurity in the vicinity of the first main surface is lowered.
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公开(公告)号：US20160163817A1
公开(公告)日：2016-06-09
申请号：US14908941
申请日：2014-06-19
发明人： Taku Horii , Takeyoshi Masuda , Ryosuke Kubota
CPC分类号： H01L29/66068 , H01L21/0465 , H01L29/0856 , H01L29/086 , H01L29/0869 , H01L29/0878 , H01L29/0886 , H01L29/1095 , H01L29/1608 , H01L29/66712 , H01L29/7395 , H01L29/7802
摘要： The steps of preparing a silicon carbide layer having a main surface, forming on the main surface, a first mask layer located on a first region to be a channel region and having a first opening portion on each of opposing regions with the first region lying therebetween, and forming a high-concentration impurity region having a first conductivity type and being higher in impurity concentration than the silicon carbide layer in a region exposed through the first opening portion, by implanting ions into the main surface with the first mask layer being interposed are included.
摘要翻译： 制备具有主表面的碳化硅层的步骤，在主表面上形成第一掩模层，第一掩模层位于作为沟道区的第一区域上，并且在每个相对区域上具有位于其间的第一区域的第一开口部分 并且通过在第一开口部分暴露的区域中形成具有第一导电类型且杂质浓度高的高浓度杂质区域，通过将第一掩模层插入主表面注入离子， 包括。
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