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    SEMICONDUCTOR DEVICE
    2.
    发明申请
    SEMICONDUCTOR DEVICE 审中-公开

    公开(公告)号：US20200020774A1

    公开(公告)日：2020-01-16

    申请号：US16453347

    申请日：2019-06-26

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Cho-eun Lee ,  Seok-hoon Kim ,  Sang-gil Lee ,  Edward Namkyu Cho ,  Min-hee Choi ,  Seung-hun Lee

    IPC: H01L29/08 ,  H01L29/78

    Abstract: A semiconductor device includes: a fin-type active region extending on a substrate in a first direction that is parallel to an upper surface of the substrate; and a source/drain region in a recess region extending into the fin-type active region, wherein the source/drain region includes: a first source/drain material layer; a second source/drain material layer on the first source/drain material layer; and a first dopant diffusion barrier layer on an interface between the first source/drain material layer and the second source/drain material layer.

    Integrated circuit devices and method of manufacturing the same
    3.
    发明授权
    Integrated circuit devices and method of manufacturing the same 有权

    公开(公告)号：US11551972B2

    公开(公告)日：2023-01-10

    申请号：US17173784

    申请日：2021-02-11

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Jin-yeong Joe ,  Seok-hoon Kim ,  Jeong-ho Yoo ,  Seung-hun Lee ,  Geun-hee Jeong

    IPC: H01L23/48 ,  H01L21/768 ,  H01L23/528

    Abstract: An integrated circuit device includes a fin-type active region extending on a substrate in a first direction parallel to a top surface of the substrate; a gate structure extending on the fin-type active region and extending in a second direction parallel to the top surface of the substrate and different from the first direction; and source/drain regions in a recess region extending from one side of the gate structure into the fin-type active region, the source/drain regions including an upper semiconductor layer on an inner wall of the recess region, having a first impurity concentration, and including a gap; and a gap-fill semiconductor layer, which fills the gap and has a second impurity concentration that is greater than the first impurity concentration.

    Integrated circuit devices and method of manufacturing the same
    4.
    发明授权
    Integrated circuit devices and method of manufacturing the same 有权

    公开(公告)号：US10714387B2

    公开(公告)日：2020-07-14

    申请号：US16275942

    申请日：2019-02-14

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Jin-yeong Joe ,  Seok-hoon Kim ,  Jeong-ho Yoo ,  Seung-hun Lee ,  Geun-hee Jeong

    IPC: H01L21/768 ,  H01L23/528

    Abstract: An integrated circuit device includes a fin-type active region extending on a substrate in a first direction parallel to a top surface of the substrate; a gate structure extending on the fin-type active region and extending in a second direction parallel to the top surface of the substrate and different from the first direction; and source/drain regions in a recess region extending from one side of the gate structure into the fin-type active region, the source/drain regions including an upper semiconductor layer on an inner wall of the recess region, having a first impurity concentration, and including a gap; and a gap-fill semiconductor layer, which fills the gap and has a second impurity concentration that is greater than the first impurity concentration.

    SEMICONDUCTOR DEVICES HAVING SOURCE/DRAIN REGIONS WITH STRAIN-INDUCING LAYERS AND METHODS OF MANUFACTURING SUCH SEMICONDUCTOR DEVICES
    7.
    发明申请
    SEMICONDUCTOR DEVICES HAVING SOURCE/DRAIN REGIONS WITH STRAIN-INDUCING LAYERS AND METHODS OF MANUFACTURING SUCH SEMICONDUCTOR DEVICES 审中-公开
    具有应变诱导层的源/漏区域的半导体器件及其制造这种半导体器件的方法

    公开(公告)号：US20160308052A1

    公开(公告)日：2016-10-20

    申请号：US15189117

    申请日：2016-06-22

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Seok-hoon Kim ,  Jin-bum Kim ,  Kwan-heum Lee ,  Byeong-chan Lee ,  Cho-eun Lee ,  Su-jin Jung

    IPC: H01L29/78 ,  H01L29/66 ,  H01L21/02 ,  H01L29/165 ,  H01L29/06 ,  H01L29/10

    CPC classification number: H01L29/7848 ,  H01L21/02236 ,  H01L21/02255 ,  H01L21/02532 ,  H01L21/02636 ,  H01L21/823431 ,  H01L21/823821 ,  H01L27/0886 ,  H01L27/0924 ,  H01L29/0649 ,  H01L29/1033 ,  H01L29/1054 ,  H01L29/165 ,  H01L29/41791 ,  H01L29/66795 ,  H01L29/7831 ,  H01L29/785 ,  H01L29/7851 ,  H01L29/7856

    Abstract: Semiconductor devices include a strain-inducing layer capable of applying a strain to a channel region of a transistor included in a miniaturized electronic device, and a method of manufacturing the semiconductor device. The semiconductor device includes a substrate having a channel region; a pair of source/drain regions provided on the substrate and arranged on both sides of the channel region in a first direction; and a gate structure provided on the channel region and comprising a gate electrode pattern extending in a second direction that is different from the first direction, a gate dielectric layer disposed between the channel region and the gate electrode pattern, and a gate spacer covering respective lateral surfaces of the gate electrode pattern and the gate dielectric layer. At least one of the source/drain regions includes a first strain-inducing layer and a second strain-inducing layer. The first strain-inducing layer is disposed between a lateral surface of the channel region and the second strain-inducing layer and contacts at least a portion of the gate dielectric layer.

    Abstract translation: 半导体器件包括能够对包括在小型化电子器件中的晶体管的沟道区域施加应变的应变诱导层以及半导体器件的制造方法。 半导体器件包括具有沟道区的衬底; 一对源极/漏极区，设置在所述衬底上并且沿着第一方向布置在所述沟道区的两侧; 以及栅极结构，设置在所述沟道区上并且包括在与所述第一方向不同的第二方向上延伸的栅极电极图案，设置在所述沟道区域和所述栅极电极图案之间的栅极介电层以及覆盖相应侧面的栅极间隔件 栅电极图案和栅介质层的表面。 源极/漏极区域中的至少一个包括第一应变诱导层和第二应变诱导层。 第一应变诱导层设置在沟道区的侧表面和第二应变诱导层之间，并与栅介质层的至少一部分接触。

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