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    SEMICONDUCTOR DEVICE
    4.
    发明公开
    SEMICONDUCTOR DEVICE 审中-公开

    公开(公告)号：US20240074155A1

    公开(公告)日：2024-02-29

    申请号：US18236143

    申请日：2023-08-21

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Taehyuk Kim ,  Taegyu Kang ,  Seokho Shin ,  Kiseok Lee ,  Sangho Lee ,  Keunnam Kim ,  Seokhan Park ,  Joongchan Shin ,  Moonyoung Jeong ,  Eunju Cho

    IPC: H10B12/00

    CPC classification number: H10B12/482 ,  H10B12/315 ,  H10B12/488

    Abstract: A semiconductor device includes a substrate, a bit line extending on the substrate in a first direction, first and second active patterns on the bit line, a back-gate electrode between the first and second active patterns and extending across the bit line and in a second direction that is perpendicular to the first direction, a first word line extending in the second direction at one side of the first active pattern, a second word line extending in the second direction at the other side of the second active pattern, and a contact pattern connected to each of the first and second active patterns, wherein the contact pattern sequentially includes an epitaxial growth layer, a doped polysilicon layer, and a silicide layer.

    Semiconductor memory device
    5.
    发明授权
    Semiconductor memory device 有权

    公开(公告)号：US11751378B2

    公开(公告)日：2023-09-05

    申请号：US17369320

    申请日：2021-07-07

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Hyungeun Choi ,  Kiseok Lee ,  Seungjae Jung ,  Joongchan Shin ,  Taehyun An ,  Moonyoung Jeong ,  Sangyeon Han

    IPC: H10B12/00 ,  H01L29/08

    CPC classification number: H10B12/30 ,  H01L29/0847 ,  H10B12/03 ,  H10B12/05

    Abstract: A semiconductor memory device includes: a bit line extending on a substrate in a vertical direction; a transistor body part including a first source-drain region, a monocrystalline channel layer, and a second source-drain region that are sequentially arranged in a first horizontal direction and connected to the bit line; gate electrode layers extending in a second horizontal direction that is orthogonal to the first horizontal direction, with a gate dielectric layer between the gate electrode layers and the monocrystalline channel layer, and covering upper and lower surfaces of the monocrystalline channel layer; and a cell capacitor including a lower electrode layer, a capacitor dielectric layer, and an upper electrode layer at a side of the transistor body that is opposite to the bit line in the first horizontal direction and is connected to the second source-drain region.

    SEMICONDUCTOR MEMORY DEVICE
    9.
    发明公开
    SEMICONDUCTOR MEMORY DEVICE 审中-公开

    公开(公告)号：US20240357801A1

    公开(公告)日：2024-10-24

    申请号：US18530342

    申请日：2023-12-06

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Hanjin Lim ,  Jinwoo Han ,  Kiseok Lee ,  Keunnam Kim ,  Seokhan Park ,  Moonyoung Jeong

    IPC: H10B12/00 ,  H01L21/28 ,  H01L29/51

    CPC classification number: H10B12/482 ,  H01L29/40111 ,  H01L29/516 ,  H10B12/315 ,  H10B12/488 ,  H10B12/50

    Abstract: A semiconductor memory device includes a bit line extending in a first direction, an active pattern on the bit line, the active pattern including first and second vertical portions facing each other in the first direction and a horizontal portion connecting the first and second vertical portions, first and second word lines on the horizontal portion between the first and second vertical portions, the first and second word lines extending in a second direction crossing the first direction, a gate insulating pattern between the first and second word lines and the active pattern, and a capacitor connected to each of the first and second vertical portions, the capacitor including a first electrode pattern connected to one of the first and second vertical portions, a second electrode pattern on the first electrode pattern, and a ferroelectric pattern between the first electrode pattern and the second electrode pattern.

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