SEMICONDUCTOR DEVICES
    1.
    发明公开

    公开(公告)号:US20240136396A1

    公开(公告)日:2024-04-25

    申请号:US18141990

    申请日:2023-04-30

    Abstract: A semiconductor device may include an active pattern on a substrate; an isolation pattern on the substrate, the isolation pattern covering opposite sidewalls of the active pattern; a liner on the isolation pattern, a liner including a material different from the isolation pattern; a gate structure contacting an upper surface of the active pattern and an upper surface of the liner; and a plurality of channels spaced apart from each other in a vertical direction perpendicular to an upper surface of the substrate, each of the plurality of channels extending through the gate structure.

    SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME

    公开(公告)号:US20230068364A1

    公开(公告)日:2023-03-02

    申请号:US17718924

    申请日:2022-04-12

    Abstract: A semiconductor device includes an active pattern provided on a substrate, a source/drain pattern provided on the active pattern, a channel pattern configured to be connected to the source/drain pattern, a gate electrode configured to be extended in a first direction and to cross the channel pattern, and a first spacer provided on a side surface of the gate electrode. The first spacer includes a fence portion provided on a side surface of the active pattern and below the source/drain pattern. The source/drain pattern includes a body portion and a neck portion between the body portion and the active pattern. The body portion includes a crystalline surface configured to be slantingly extended from the neck portion. The crystalline surface is configured to be spaced apart from an uppermost portion of the fence portion.

    SEMICONDUCTOR DEVICE
    7.
    发明申请

    公开(公告)号:US20240421207A1

    公开(公告)日:2024-12-19

    申请号:US18670738

    申请日:2024-05-22

    Abstract: A semiconductor device includes a substrate insulating layer having a lower insulating pattern protruding from an upper surface of the substrate insulating layer and extending in a first direction; a semiconductor pattern extending on the lower insulating pattern of the substrate insulating layer in the first direction; a plurality of channel layers stacked on the semiconductor pattern and spaced apart from each other in a direction perpendicular to the upper surface of the substrate insulating layer; a gate structure intersecting the semiconductor pattern, extending in a second direction crossing the first direction, and surrounding the plurality of channel layers; first and second source/drain regions disposed on the semiconductor pattern on both sides of the gate structure; and an intermediate insulating pattern disposed between the lower insulating pattern and the semiconductor pattern and having a thickness equal to or less than a distance between the plurality of channel layers.

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