Semiconductor device
    1.
    发明授权

    公开(公告)号:US11469252B2

    公开(公告)日:2022-10-11

    申请号:US16942093

    申请日:2020-07-29

    Abstract: A semiconductor device is provided. The semiconductor device includes a first stacked structure including a plurality of first insulating patterns and a plurality of first semiconductor patterns alternately stacked on a substrate, the first stacked structure extending in a first direction parallel to an upper surface of the substrate, a first conductive pattern on one side surface of the first stacked structure, the first conductive pattern extending in a second direction crossing the upper surface of the substrate, and a first ferroelectric layer between the first stacked structure and the first conductive pattern, the first ferroelectric layer extending in the second direction, wherein each of the first semiconductor patterns includes a first impurity region, a first channel region and a second impurity region which are sequentially arranged along the first direction.

    Semiconductor device
    2.
    发明授权

    公开(公告)号:US10998301B2

    公开(公告)日:2021-05-04

    申请号:US16531778

    申请日:2019-08-05

    Abstract: A semiconductor device includes a first semiconductor structure including circuit devices and first bonding pads; and a second semiconductor structure connected to the first semiconductor structure, the second semiconductor structure including a base layer; a first memory cell structure including first gate electrodes and first channels penetrating through the first gate electrodes; a second memory cell structure including second gate electrodes and second channels penetrating through the second gate electrodes; bit lines between the first and the second memory cell structures, and electrically connected to the first and second channels in common; first and second conductive layers on the second surface of the base layer; a pad insulating layer having an opening exposing a portion of the second conductive layer; and second bonding pads disposed to correspond to the first bonding pads in a lower portion of the second memory cell structure.

    SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME

    公开(公告)号:US20240040795A1

    公开(公告)日:2024-02-01

    申请号:US18351407

    申请日:2023-07-12

    Abstract: A semiconductor device comprises a substrate that extends in first and second directions and includes a cell region and an extension region that extends from the cell region in the first direction, first and second insulating layers alternately stacked on the substrate in a third direction, a conductive line disposed on one sidewall of the second insulating layer in the second direction, a conductive pillar that extends in the third direction and penetrates through the first insulating layer, a semiconductor layer disposed on one sidewall of the conductive pillar and that extends in the third direction, and a ferroelectric layer disposed between the conductive line and the semiconductor layer and that extends in the third direction. The conductive line includes first and second conductive patterns spaced apart from each other in the second direction, and the second insulating layer is disposed between the first and second conductive patterns.

    Semiconductor memory device and method for fabricating thereof

    公开(公告)号:US11711918B2

    公开(公告)日:2023-07-25

    申请号:US17227793

    申请日:2021-04-12

    CPC classification number: H10B41/70 H10B41/20 H10B41/35 H10B41/41 H10B41/50

    Abstract: Provided is a semiconductor memory device. The semiconductor memory device comprises a first semiconductor pattern including a first impurity region, a second impurity region, and a channel region, the first impurity region spaced apart from a substrate in a first direction and having a first conductivity type, the second impurity region having a second conductivity type different from the first conductivity type, and the channel region between the first impurity region and the second impurity region, a first conductive connection line connected to the first impurity region and extending in a second direction different from the first direction and a first gate structure extending in the first direction and including a first gate electrode and a first gate insulating film, wherein the first gate electrode penetrates the channel region and the first gate insulating film is between the first gate electrode and the semiconductor pattern.

    Mobile terminal and object change support method for the same

    公开(公告)号:US10831362B2

    公开(公告)日:2020-11-10

    申请号:US16104704

    申请日:2018-08-17

    Abstract: A mobile terminal and a method of supporting an object change for the same are provided. The mobile terminal includes a display unit for outputting at least one object, and a control unit for controlling at least one of directly displaying, in response to a signal for changing the output object into a second object having a similar function but being of a different type than the output object, the second object on the display unit without a screen transition, and for outputting, in response to a signal for changing the output object into a second object having a similar function but being of a different type than the output object, a guide frame on the display unit so as to facilitate change of the output object without a screen transition.

    Semiconductor device
    9.
    发明授权

    公开(公告)号:US10319427B2

    公开(公告)日:2019-06-11

    申请号:US15794628

    申请日:2017-10-26

    Abstract: A semiconductor device includes a memory cell region including memory cells arranged along channel holes, the channel holes being provided on a substrate to extend in a direction perpendicular to an upper surface of the substrate, and a peripheral circuit region disposed outside of the memory cell region and including low voltage transistors and high voltage transistors. The low voltage transistors include first transistors including a first gate dielectric layer and a first gate electrode layer including a metal, and the high voltage transistors include second transistors including a second gate dielectric layer having a dielectric constant lower than a dielectric constant of the first gate dielectric layer, and a second gate electrode layer including polysilicon.

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