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    Semiconductor device
    1.
    发明授权
    Semiconductor device 有权

    公开(公告)号：US11469252B2

    公开(公告)日：2022-10-11

    申请号：US16942093

    申请日：2020-07-29

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Seok Han Park ,  Yong Seok Kim ,  Hui-Jung Kim ,  Satoru Yamada ,  Kyung Hwan Lee ,  Jae Ho Hong ,  Yoo Sang Hwang

    IPC: H01L27/11597 ,  H01L27/1159 ,  H01L29/06 ,  H01L29/45 ,  H01L29/78 ,  H01L29/786 ,  H01L49/02

    Abstract: A semiconductor device is provided. The semiconductor device includes a first stacked structure including a plurality of first insulating patterns and a plurality of first semiconductor patterns alternately stacked on a substrate, the first stacked structure extending in a first direction parallel to an upper surface of the substrate, a first conductive pattern on one side surface of the first stacked structure, the first conductive pattern extending in a second direction crossing the upper surface of the substrate, and a first ferroelectric layer between the first stacked structure and the first conductive pattern, the first ferroelectric layer extending in the second direction, wherein each of the first semiconductor patterns includes a first impurity region, a first channel region and a second impurity region which are sequentially arranged along the first direction.

    Semiconductor memory device
    2.
    发明授权
    Semiconductor memory device 有权

    公开(公告)号：US12048150B2

    公开(公告)日：2024-07-23

    申请号：US17377848

    申请日：2021-07-16

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Kyung Hwan Lee ,  Yong Seok Kim ,  Il Gweon Kim ,  Hyun Cheol Kim ,  Hyeoung Won Seo ,  Sung Won Yoo ,  Jae Ho Hong

    IPC: H10B43/20 ,  H10B43/10

    CPC classification number: H10B43/20 ,  H10B43/10

    Abstract: A semiconductor memory device having improved electrical characteristics is provided. The semiconductor memory device comprises a first semiconductor pattern separated from a substrate in a first direction, a first gate structure extending in the first direction and penetrating the first semiconductor pattern, a first conductive connecting line connected to the first semiconductor pattern and extending in a second direction different from the first direction, and a second conductive connecting line connected to the first semiconductor pattern. The first gate structure is between the first conductive connecting line and the second conductive connecting line, the first gate structure includes a first gate electrode and a first gate insulating film, and the first gate insulating film includes a first charge holding film contacting with the first semiconductor pattern.

    Semiconductor memory device and method for fabricating thereof
    5.
    发明授权
    Semiconductor memory device and method for fabricating thereof 有权

    公开(公告)号：US11711918B2

    公开(公告)日：2023-07-25

    申请号：US17227793

    申请日：2021-04-12

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Kyung Hwan Lee ,  Yong Seok Kim ,  Hyun Cheol Kim ,  Satoru Yamada ,  Sung Won Yoo ,  Jae Ho Hong

    IPC: H10B41/70 ,  H10B41/20 ,  H10B41/35 ,  H10B41/41 ,  H10B41/50

    CPC classification number: H10B41/70 ,  H10B41/20 ,  H10B41/35 ,  H10B41/41 ,  H10B41/50

    Abstract: Provided is a semiconductor memory device. The semiconductor memory device comprises a first semiconductor pattern including a first impurity region, a second impurity region, and a channel region, the first impurity region spaced apart from a substrate in a first direction and having a first conductivity type, the second impurity region having a second conductivity type different from the first conductivity type, and the channel region between the first impurity region and the second impurity region, a first conductive connection line connected to the first impurity region and extending in a second direction different from the first direction and a first gate structure extending in the first direction and including a first gate electrode and a first gate insulating film, wherein the first gate electrode penetrates the channel region and the first gate insulating film is between the first gate electrode and the semiconductor pattern.

    Semiconductor memory devices and methods for fabricating the same
    6.
    发明授权
    Semiconductor memory devices and methods for fabricating the same 有权

    公开(公告)号：US11903184B2

    公开(公告)日：2024-02-13

    申请号：US17392488

    申请日：2021-08-03

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Kyung Hwan Lee ,  Yong Seok Kim ,  Il Gweon Kim ,  Hui-Jung Kim ,  Min Hee Cho ,  Jae Ho Hong

    IPC: H01L27/108 ,  H01L29/24 ,  H10B12/00 ,  G11C11/402

    CPC classification number: H10B12/34 ,  G11C11/4023 ,  H01L29/24

    Abstract: A semiconductor memory device in which performance and reliability are improved, and a method for fabricating the same are provided. The semiconductor memory device includes a conductive line extending in a first direction on a substrate, an interlayer insulation film that includes a cell trench extending in a second direction intersecting the first direction, on the substrate, a first gate electrode and a second gate electrode that are spaced apart from each other in the first direction and each extend in the second direction, inside the cell trench, a channel layer that is inside the cell trench and is electrically connected to the conductive line, on the first gate electrode and the second gate electrode, and a gate insulation layer interposed between the first gate electrode and the channel layer, and between the second gate electrode and the channel layer.

    SEMICONDUCTOR MEMORY DEVICES AND METHODS FOR FABRICATING THE SAME
    7.
    发明申请
    SEMICONDUCTOR MEMORY DEVICES AND METHODS FOR FABRICATING THE SAME 有权

    公开(公告)号：US20220199625A1

    公开(公告)日：2022-06-23

    申请号：US17392488

    申请日：2021-08-03

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Kyung Hwan Lee ,  Yong Seok Kim ,  Il Gweon Kim ,  Hui-Jung Kim ,  Min Hee Cho ,  Jae Ho Hong

    IPC: H01L27/108 ,  G11C11/402 ,  H01L29/24

    Abstract: A semiconductor memory device in which performance and reliability are improved, and a method for fabricating the same are provided. The semiconductor memory device includes a conductive line extending in a first direction on a substrate, an interlayer insulation film that includes a cell trench extending in a second direction intersecting the first direction, on the substrate, a first gate electrode and a second gate electrode that are spaced apart from each other in the first direction and each extend in the second direction, inside the cell trench, a channel layer that is inside the cell trench and is electrically connected to the conductive line, on the first gate electrode and the second gate electrode, and a gate insulation layer interposed between the first gate electrode and the channel layer, and between the second gate electrode and the channel layer.

    Semiconductor device including data storage structure
    8.
    发明授权
    Semiconductor device including data storage structure 有权

    公开(公告)号：US11165018B2

    公开(公告)日：2021-11-02

    申请号：US16592041

    申请日：2019-10-03

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Kyung Hwan Lee ,  Yong Seok Kim ,  Tae Hun Kim ,  Seok Han Park ,  Satoru Yamada ,  Jae Ho Hong

    IPC: H01L45/00 ,  H01L27/24

    Abstract: A semiconductor device includes a stack structure on a substrate, the stack structure including alternating gate electrodes and insulating layers stacked along a first direction, a vertical opening through the stack structure along the first direction, the vertical opening including a channel structure having a semiconductor layer on an inner sidewall of the vertical opening, and a variable resistive material on the semiconductor layer, a vacancy concentration in the variable resistive material varies along its width to have a higher concentration closer to a center of the channel structure than to the semiconductor layer, and an impurity region on the substrate, the semiconductor layer contacting the impurity region at a bottom of the channel structure.

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