公开(公告)号：US20210288054A1

公开(公告)日：2021-09-16

申请号：US17032277

申请日：2020-09-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： HYOJOON RYU ,  KWANYONG KIM ,  SEOGOO KANG ,  SUNIL SHIM ,  WONSEOK CHO ,  JEEHON HAN

IPC: H01L27/1157 ,  H01L23/522 ,  H01L27/11565 ,  H01L27/11582 ,  H01L27/11573

Abstract: A semiconductor device includes; a memory stack disposed on a substrate and including a lower gate electrode, an upper gate stack including a string selection line, a vertically extending memory gate contact disposed on the lower gate electrode, and a vertically extending selection line stud disposed on the string selection line. The string selection line includes a material different from that of the lower gate electrode, and the selection line stud includes a material different from that of the memory gate contact.

公开(公告)号：US20220208269A1

公开(公告)日：2022-06-30

申请号：US17698627

申请日：2022-03-18

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： KWANYONG KIM ,  SUNIL SHIM ,  WONSEOK CHO

IPC: G11C16/08 ,  G11C16/04

Abstract: An integrated circuit device includes a plurality of word lines, a string selection line structure stacked on the plurality of word lines, and a plurality of channel structures extending in a vertical direction through the plurality of word lines and the string selection line structure. The string selection line structure includes a string selection bent line including a lower horizontal extension portion extending in a horizontal direction at a first level higher than the plurality of word lines, an upper horizontal extension portion extending in the horizontal direction at a second level higher than the first level, and a vertical extension portion connected between the lower horizontal extension portion and the upper horizontal extension portion.

公开(公告)号：US20160049346A1

公开(公告)日：2016-02-18

申请号：US14925789

申请日：2015-10-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： JAE-JOO SHIM ,  HANSOO KIM ,  WONSEOK CHO ,  JAEHOON JANG ,  WOOJIN CHO

IPC: H01L23/31 ,  H01L23/29 ,  H01L27/115 ,  H01L23/528

CPC classification number: H01L23/3157 ,  H01L21/76816 ,  H01L23/291 ,  H01L23/528 ,  H01L27/11519 ,  H01L27/11521 ,  H01L27/11551 ,  H01L27/11556 ,  H01L27/11565 ,  H01L27/11568 ,  H01L27/11578 ,  H01L27/11582 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Provided are a three-dimensional semiconductor device and a method of fabricating the same. The three-dimensional semiconductor device may include a mold structure for providing gap regions and an interconnection structure including a plurality of interconnection patterns disposed in the gap regions. The mold structure may include interlayer molds defining upper surfaces and lower surfaces of the interconnection patterns and sidewall molds defining sidewalls of the interconnection patterns below the interlayer molds.

Abstract translation: 提供一种三维半导体器件及其制造方法。 三维半导体器件可以包括用于提供间隙区域的模具结构和包括布置在间隙区域中的多个互连图案的互连结构。 模具结构可以包括限定互连图案的上表面和下表面的层间模具和限定层间模具下面的互连图案的侧壁的侧壁模具。

公开(公告)号：US20230262984A1

公开(公告)日：2023-08-17

申请号：US18138189

申请日：2023-04-24

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： HYOJOON RYU ,  KWANYONG KIM ,  SEOGOO KANG ,  SUNIL SHIM ,  WONSEOK CHO ,  JEEHON HAN

IPC: H10B43/35 ,  H01L23/522 ,  H10B43/10 ,  H10B43/27 ,  H10B43/40

CPC classification number: H10B43/35 ,  H01L23/5226 ,  H10B43/10 ,  H10B43/27 ,  H10B43/40

Abstract: A semiconductor device includes; a memory stack disposed on a substrate and including a lower gate electrode, an upper gate stack including a string selection line, a vertically extending memory gate contact disposed on the lower gate electrode, and a vertically extending selection line stud disposed on the string selection line. The string selection line includes a material different from that of the lower gate electrode, and the selection line stud includes a material different from that of the memory gate contact.

公开(公告)号：US20220302041A1

公开(公告)日：2022-09-22

申请号：US17469952

申请日：2021-09-09

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： KWANYONG KIM ,  SUNGWON SHIN ,  SEUNGMIN LEE ,  JUYOUNG LIM ,  WONSEOK CHO

IPC: H01L23/532 ,  H01L23/528 ,  H01L27/11539

Abstract: A semiconductor device includes a first stack structure on a substrate, and a second stack structure on the first stack structure. A channel structure extends through the first stack structure and the second stack structure. A first auxiliary stack structure including a plurality of first insulating layers and a plurality of first mold layers are alternately stacked on the substrate. An alignment key extends into the first auxiliary stack structure and protrudes to a higher level than an uppermost end of the first stack structure. A second auxiliary stack structure is disposed on the first auxiliary stack structure and the alignment key, and includes a plurality of second insulating layers and a plurality of second mold layers alternately stacked. The second auxiliary stack structure includes a protrusion aligned with the alignment key.

公开(公告)号：US20170263643A1

公开(公告)日：2017-09-14

申请号：US15609578

申请日：2017-05-31

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： SUNIL SHIM ,  WONSEOK CHO ,  WOONKYUNG LEE

IPC: H01L27/11582 ,  H01L23/538 ,  H01L27/11556 ,  H01L27/11565 ,  H01L27/24 ,  H01L29/78 ,  H01L45/00

CPC classification number: H01L27/11582 ,  H01L23/5384 ,  H01L27/11556 ,  H01L27/11565 ,  H01L27/2409 ,  H01L27/2481 ,  H01L27/249 ,  H01L29/7827 ,  H01L45/04 ,  H01L45/06 ,  H01L45/1226 ,  H01L45/144 ,  H01L45/146 ,  H01L45/147 ,  H01L45/148 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device includes a plurality of first insulating layers and a plurality of second layers alternately and vertically stacked on a substrate. Each of the plurality of second layers includes a horizontal electrode horizontally separated by a second insulating layer. A contact plug penetrates the plurality of first insulating layers and the second insulating layer of the plurality of second layers.

公开(公告)号：US20150093865A1

公开(公告)日：2015-04-02

申请号：US14563432

申请日：2014-12-08

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： SUNIL SHIM ,  WONSEOK CHO ,  WOONKYUNG LEE

IPC: H01L27/115 ,  H01L27/24

CPC classification number: H01L27/11582 ,  H01L23/5384 ,  H01L27/11556 ,  H01L27/11565 ,  H01L27/2409 ,  H01L27/2481 ,  H01L27/249 ,  H01L29/7827 ,  H01L45/04 ,  H01L45/06 ,  H01L45/1226 ,  H01L45/144 ,  H01L45/146 ,  H01L45/147 ,  H01L45/148 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device includes a plurality of first insulating layers and a plurality of second layers alternately and vertically stacked on a substrate. Each of the plurality of second layers includes a horizontal electrode horizontally separated by a second insulating layer. A contact plug penetrates the plurality of first insulating layers and the second insulating layer of the plurality of second layers.

Abstract translation: 半导体器件包括多个第一绝缘层和多个第二层，其交替地和垂直地堆叠在基板上。 多个第二层中的每一个包括由第二绝缘层水平隔开的水平电极。 接触插塞穿透多个第二绝缘层和多个第二层中的第二绝缘层。