公开(公告)号：US20210288054A1

公开(公告)日：2021-09-16

申请号：US17032277

申请日：2020-09-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： HYOJOON RYU ,  KWANYONG KIM ,  SEOGOO KANG ,  SUNIL SHIM ,  WONSEOK CHO ,  JEEHON HAN

IPC: H01L27/1157 ,  H01L23/522 ,  H01L27/11565 ,  H01L27/11582 ,  H01L27/11573

Abstract: A semiconductor device includes; a memory stack disposed on a substrate and including a lower gate electrode, an upper gate stack including a string selection line, a vertically extending memory gate contact disposed on the lower gate electrode, and a vertically extending selection line stud disposed on the string selection line. The string selection line includes a material different from that of the lower gate electrode, and the selection line stud includes a material different from that of the memory gate contact.

公开(公告)号：US20220208269A1

公开(公告)日：2022-06-30

申请号：US17698627

申请日：2022-03-18

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： KWANYONG KIM ,  SUNIL SHIM ,  WONSEOK CHO

IPC: G11C16/08 ,  G11C16/04

Abstract: An integrated circuit device includes a plurality of word lines, a string selection line structure stacked on the plurality of word lines, and a plurality of channel structures extending in a vertical direction through the plurality of word lines and the string selection line structure. The string selection line structure includes a string selection bent line including a lower horizontal extension portion extending in a horizontal direction at a first level higher than the plurality of word lines, an upper horizontal extension portion extending in the horizontal direction at a second level higher than the first level, and a vertical extension portion connected between the lower horizontal extension portion and the upper horizontal extension portion.

公开(公告)号：US20230262984A1

公开(公告)日：2023-08-17

申请号：US18138189

申请日：2023-04-24

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： HYOJOON RYU ,  KWANYONG KIM ,  SEOGOO KANG ,  SUNIL SHIM ,  WONSEOK CHO ,  JEEHON HAN

IPC: H10B43/35 ,  H01L23/522 ,  H10B43/10 ,  H10B43/27 ,  H10B43/40

CPC classification number: H10B43/35 ,  H01L23/5226 ,  H10B43/10 ,  H10B43/27 ,  H10B43/40

Abstract: A semiconductor device includes; a memory stack disposed on a substrate and including a lower gate electrode, an upper gate stack including a string selection line, a vertically extending memory gate contact disposed on the lower gate electrode, and a vertically extending selection line stud disposed on the string selection line. The string selection line includes a material different from that of the lower gate electrode, and the selection line stud includes a material different from that of the memory gate contact.

公开(公告)号：US20220302041A1

公开(公告)日：2022-09-22

申请号：US17469952

申请日：2021-09-09

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： KWANYONG KIM ,  SUNGWON SHIN ,  SEUNGMIN LEE ,  JUYOUNG LIM ,  WONSEOK CHO

IPC: H01L23/532 ,  H01L23/528 ,  H01L27/11539

Abstract: A semiconductor device includes a first stack structure on a substrate, and a second stack structure on the first stack structure. A channel structure extends through the first stack structure and the second stack structure. A first auxiliary stack structure including a plurality of first insulating layers and a plurality of first mold layers are alternately stacked on the substrate. An alignment key extends into the first auxiliary stack structure and protrudes to a higher level than an uppermost end of the first stack structure. A second auxiliary stack structure is disposed on the first auxiliary stack structure and the alignment key, and includes a plurality of second insulating layers and a plurality of second mold layers alternately stacked. The second auxiliary stack structure includes a protrusion aligned with the alignment key.