-
公开(公告)号：US11948632B2
公开(公告)日：2024-04-02
申请号：US17497502
申请日：2021-10-08
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Jungyu Lee , Hyunkook Parak , Jongryul Kim
CPC classification number: G11C13/0004 , G11C13/0026 , G11C13/0028 , G11C13/0038 , G11C13/0069
Abstract: A memory device includes a phase change memory (PCM) cell connected between a bit line and a word line. An X-decoder provides a word line voltage to the word line during a reset operation, and a Y-decoder provides a bit line voltage to the bit line during the reset operation. A voltage bias circuit generates the word line voltage and the bit line voltage based on a first bias during a first period of the reset operation, the word line voltage and the bit line voltage based on a second bias greater than the first bias during a second period of the reset operation, and the word line voltage and the bit line voltage based on a third bias smaller than the first and second biases during a third period of the reset operation.
-
公开(公告)号：US11475948B2
公开(公告)日：2022-10-18
申请号：US16999189
申请日：2020-08-21
Applicant: Samsung Electronics Co., Ltd.
Inventor： Jongryul Kim , Jinyoung Kim , Taehui Na
Abstract: A memory device and a method of operating the same. The memory device includes a memory cell array including a plurality of memory cells disposed in an area where a plurality of word lines and a plurality of bit lines cross each other; a row decoder including row switches and configured to perform a selection operation on the plurality of word lines; a column decoder including column switches and configured to perform a selection operation on the plurality of bit lines; and a control logic configured to control, in a data read operation, a precharge operation to be performed on a selected word line in a word line precharge period, and to control a precharge operation to be performed on a selected bit line in a bit line precharge period; wherein a row switch connected to the selected word line is weakly turned on in the bit line precharge period.
-
公开(公告)号：US20210027829A1
公开(公告)日：2021-01-28
申请号：US16797700
申请日：2020-02-21
Applicant: Samsung Electronics Co., Ltd.
Inventor： Jongryul Kim , Taehui Na , Dueung Kim , Jongmin Baek
IPC: G11C11/408 , G11C11/4094 , G11C11/4091 , G11C11/4074 , G11C11/56
Abstract: A memory device includes a plurality of memory cells each including a switching device and a storage device having a phase change material, a decoder circuit including a first bias circuit inputting a first bias voltage to a selected word line connected to a selected memory cell, a second bias circuit inputting a second bias voltage to a selected bit line, a first selection switching device and a first non-selection switching device connected between the first bias circuit and the selected word line, and a second selection switching device and a second non-selection switching device connected between an adjacent word line and the first bias circuit, a control logic sequentially turning off the first selection switching device and the second non-selection switching device, and a sense amplifier comparing a voltage of the selected word line with a reference voltage to determine data of a read operation.
-
4.发明授权公开(公告)号：US11100990B2
公开(公告)日：2021-08-24
申请号：US16813826
申请日：2020-03-10
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Ji-Hoon Lim , Jongryul Kim , Taehui Na , Venkataramana Gangasani
IPC: G11C11/408 , G11C13/00 , G11C11/22 , G11C11/16
Abstract: A memory device includes a memory cell connected to a word line and a bit line, a row driver that drives the word line to a precharge level, a column driver that drives the bit line to a first target level, a sense amplifier that senses a first sensing level of the word line after the first target level is applied to the memory cell, and a read control circuit that controls the column driver so that a second target level different from the first target level is selectively applied to the memory cell depending on the first sensing level sensed by the sense amplifier.
-
公开(公告)号：US12087361B2
公开(公告)日：2024-09-10
申请号：US18177320
申请日：2023-03-02
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Bilal Ahmad Janjua , Jongryul Kim , Venkataramana Gangasani , Jungyu Lee
CPC classification number: G11C13/0069 , G11C13/0004 , G11C13/0026 , G11C13/0028 , G11C13/003 , G11C2013/0078 , G11C2213/71 , G11C2213/72 , H10B63/24 , H10B63/84 , H10N70/231 , H10N70/8413 , H10N70/8828
Abstract: A memory device includes a plurality of memory cells, each including a switching device and an information storage device connected to the switching device and having a phase change material, the plurality of memory cells connected to a plurality of word lines and a plurality of bit lines, a decoder circuit determining at least one of the plurality of memory cells to be a selected memory cell, and a program circuit configured to input a programming current to the selected memory cell to perform a programming operation and configured to detect a resistance of the selected memory cell to adjust a magnitude of the programming current.
-
Patent Agency Ranking
公开(公告)号：US11127457B2
公开(公告)日：2021-09-21
申请号：US16803450
申请日：2020-02-27
Applicant: Samsung Electronics Co., Ltd.
Inventor： Jongryul Kim , Taehui Na , Dueung Kim , Jongmin Baek
IPC: G11C11/56 , G11C11/4074 , G11C11/4094 , G11C11/4091 , G11C11/408
Abstract: The memory device includes a memory cell array including a plurality of memory cells connected to a plurality of word lines and a plurality of bit lines, a row control circuit including a plurality of row switches corresponding to the word lines, a column control circuit including a plurality of column switches corresponding to the bit lines, and a control logic circuit configured to control pre-charge operations on a word line and a bit line of a selected memory cell and perform a control operation to float the word line and the bit line together after a pre-charge period during a data reading operation. One of the word line and the bit line is floated after the pre-charge period and the other one is pseudo-floated after the pre-charge period.
-
公开(公告)号：US10998038B2
公开(公告)日：2021-05-04
申请号：US16797700
申请日：2020-02-21
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Jongryul Kim , Taehui Na , Dueung Kim , Jongmin Baek
IPC: G11C8/00 , G11C11/408 , G11C11/56 , G11C11/4091 , G11C11/4074 , G11C11/4094
Abstract: A memory device includes a plurality of memory cells each including a switching device and a storage device having a phase change material, a decoder circuit including a first bias circuit inputting a first bias voltage to a selected word line connected to a selected memory cell, a second bias circuit inputting a second bias voltage to a selected bit line, a first selection switching device and a first non-selection switching device connected between the first bias circuit and the selected word line, and a second selection switching device and a second non-selection switching device connected between an adjacent word line and the first bias circuit, a control logic sequentially turning off the first selection switching device and the second non-selection switching device, and a sense amplifier comparing a voltage of the selected word line with a reference voltage to determine data of a read operation.
-
公开(公告)号：US20210027837A1
公开(公告)日：2021-01-28
申请号：US16803450
申请日：2020-02-27
Applicant: Samsung Electronics Co., Ltd.
Inventor： Jongryul Kim , Taehui NA , Dueung KIM , Jongmin BAEK
IPC: G11C11/56 , G11C11/408 , G11C11/4094 , G11C11/4091 , G11C11/4074
Abstract: The memory device includes a memory cell array including a plurality of memory cells connected to a plurality of word lines and a plurality of bit lines, a row control circuit including a plurality of row switches corresponding to the word lines, a column control circuit including a plurality of column switches corresponding to the bit lines, and a control logic circuit configured to control pre-charge operations on a word line and a bit line of a selected memory cell and perform a control operation to float the word line and the bit line together after a pre-charge period during a data reading operation. One of the word line and the bit line is floated after the pre-charge period and the other one is pseudo-floated after the pre-charge period.
-
公开(公告)号：US11615841B2
公开(公告)日：2023-03-28
申请号：US16871481
申请日：2020-05-11
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Bilal Ahmad Janjua , Jongryul Kim , Venkataramana Gangasani , Jungyu Lee
Abstract: A memory device includes a plurality of memory cells, each including a switching device and an information storage device connected to the switching device and having a phase change material, the plurality of memory cells connected to a plurality of word lines and a plurality of bit lines, a decoder circuit determining at least one of the plurality of memory cells to be a selected memory cell, and a program circuit configured to input a programming current to the selected memory cell to perform a programming operation and configured to detect a resistance of the selected memory cell to adjust a magnitude of the programming current.
-
公开(公告)号：US20210118502A1
公开(公告)日：2021-04-22
申请号：US16871481
申请日：2020-05-11
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Bilal Ahmad Janjua , Jongryul Kim , Venkataramana Gangasani , Jungyu Lee
IPC: G11C13/00
Abstract: A memory device includes a plurality of memory cells, each including a switching device and an information storage device connected to the switching device and having a phase change material, the plurality of memory cells connected to a plurality of word lines and a plurality of bit lines, a decoder circuit determining at least one of the plurality of memory cells to be a selected memory cell, and a program circuit configured to input a programming current to the selected memory cell to perform a programming operation and configured to detect a resistance of the selected memory cell to adjust a magnitude of the programming current.
-
-
-
-
-
-
-
-
-
Search Results
10
records
(took 0.025 seconds)
