Abstract:
A communication device with a power detection scheme is disclosed. The communication device includes a transmitter for transmitting an RF signal, a demodulator for demodulating the RF signal by utilizing a phase-modulated (PM) signal provided from the transmitter to generate a demodulated signal, a loopback circuit coupled between the transmitter and the demodulator for transmitting the RF signal and the PM signal from the transmitter to the demodulator when the power detection scheme is enabled, and a power detector for detecting power of the demodulated signal.
Abstract:
Aspects of the disclosure provide methods and apparatuses for generating an internal reset signal that is synchronous to a clock signal. In some embodiments, an apparatus includes a clock switch circuit and a plurality of serially coupled D flip-flops (DFFs). The clock switch circuit receiving the clock signal can output the clock signal in an on state and block the clock signal in an off state. The plurality of serially coupled DFFs are coupled to the clock switch circuit and driven by the clock signal. If an external reset signal is enabled, the plurality of serially coupled DFFs can enable the internal reset signal. If the external reset signal is disabled, after a predefined number of clock signal cycles, the plurality of serially coupled DFFs can disable the internal reset signal.
Abstract:
Methods and apparatus are provided for detection path design for reflection coefficient estimation. In one novel aspect, a hardware-based phase estimator estimates a phase shift between the forward path signal and the reverse path signal. In one embodiment, a data selector is used to pass only signals above a magnitude threshold. In another embodiment, a modified phase unwrap algorithm stores an unwrapping correction for subsequent samples and updates the stored unwrapping correction upon processing of each sample processed. In another novel aspect, mixed hardware and software solutions are used. In one embodiment, the reference signal and the detection signals are matched such that the modulation signal interference is removed. In some embodiments, one or two power detectors and a cross-correlator are used. In yet another embodiment, two detection measurement paths are used to obtain the reflection coefficient. In one embodiment, fractional timing offset is estimated to obtain the reflection coefficient.
Abstract:
Methods and apparatus are provided for detection path design for reflection coefficient estimation. In one novel aspect, a hardware-based phase estimator estimates a phase shift between the forward path signal and the reverse path signal. In one embodiment, a data selector is used to pass only signals above a magnitude threshold. In another embodiment, a modified phase unwrap algorithm stores an unwrapping correction for subsequent samples and updates the stored unwrapping correction upon processing of each sample processed. In another novel aspect, mixed hardware and software solutions are used. In one embodiment, the reference signal and the detection signals are matched such that the modulation signal interference is removed. In some embodiments, one or two power detectors and a cross-correlator are used. In yet another embodiment, two detection measurement paths are used to obtain the reflection coefficient. In one embodiment, fractional timing offset is estimated to obtain the reflection coefficient.
Abstract:
Methods and apparatus are provided for detection path design for reflection coefficient estimation. In one novel aspect, a hardware-based phase estimator estimates a phase shift between the forward path signal and the reverse path signal. In one embodiment, a data selector is used to pass only signals above a magnitude threshold. In another embodiment, a modified phase unwrap algorithm stores an unwrapping correction for subsequent samples and updates the stored unwrapping correction upon processing of each sample processed. In another novel aspect, mixed hardware and software solutions are used. In one embodiment, the reference signal and the detection signals are matched such that the modulation signal interference is removed. In some embodiments, one or two power detectors and a cross-correlator are used. In yet another embodiment, two detection measurement paths are used to obtain the reflection coefficient. In one embodiment, fractional timing offset is estimated to obtain the reflection coefficient.
Abstract:
Methods and apparatus are provided for detection path design for reflection coefficient estimation. In one novel aspect, a hardware-based phase estimator estimates a phase shift between the forward path signal and the reverse path signal. In one embodiment, a data selector is used to pass only signals above a magnitude threshold. In another embodiment, a modified phase unwrap algorithm stores an unwrapping correction for subsequent samples and updates the stored unwrapping correction upon processing of each sample processed. In another novel aspect, mixed hardware and software solutions are used. In one embodiment, the reference signal and the detection signals are matched such that the modulation signal interference is removed. In some embodiments, one or two power detectors and a cross-correlator are used. In yet another embodiment, two detection measurement paths are used to obtain the reflection coefficient. In one embodiment, fractional timing offset is estimated to obtain the reflection coefficient.
Abstract:
The invention provides a body-contact metal-oxide-semiconductor field effect transistor (MOSFET) device. The body-contact MOSFET device includes a substrate. An active region is disposed on the substrate. A gate strip is extended along a first direction disposed on a first portion of the active region. A source doped region and a drain doped region are disposed on a second portion and a third portion of the active region, adjacent to opposite sides of the gate strip. The opposite sides of the gate strip are extended along the first direction. A body-contact doped region is disposed on a fourth portion of the active region. The body-contact doped region is separated from the gate strip by a fifth portion of the active region. The fifth portion is not covered by any silicide features.
Abstract:
A calibration method is applied to a wireless communication device having a programmable tuner and a signal processing path. The calibration method includes at least the following steps: configuring the programmable tuner to have a plurality of different tuner states, wherein the signal processing path has a first end and a second end, and the programmable tuner is coupled to the second end; when the programmable tuner is configured to have one of the different tuner states, obtaining a measured reflection coefficient at the first end of the signal processing path; and calibrating mapping relationship between a reflection coefficient at the first end of the signal processing path and a reflection coefficient at the second end of the signal processing path according to the different tuner states and measured reflection coefficients associated with the different tuner states.
Abstract:
An impedance tuning control apparatus has a processing circuit and an output circuit. The processing circuit determines a first control setting according to a first performance metric, and performs a search operation with a search start point set by the first control setting to find a second control setting according to a second performance metric. The second performance metric is different from the first performance metric. The output circuit outputs a final control setting to a tuner, wherein the final control setting is derived from the second control setting.
Abstract:
An impedance tuning control apparatus has a processing circuit and an output circuit. The processing circuit determines a first control setting according to a first performance metric, and performs a search operation with a search start point set by the first control setting to find a second control setting according to a second performance metric. The second performance metric is different from the first performance metric. The output circuit outputs a final control setting to a tuner, wherein the final control setting is derived from the second control setting.