知搜-全球专利检索

  1. Login
  2. Sign Up

Search Results

25 records (took 0.041 seconds)

    MULTILEVEL WAVEGUIDE STRUCTURE
    1.
    发明申请
    MULTILEVEL WAVEGUIDE STRUCTURE 有权
    多波形结构

    公开(公告)号：US20160377806A1

    公开(公告)日：2016-12-29

    申请号：US14749907

    申请日：2015-06-25

    Applicant: International Business Machines Corporation

    Inventor： John J. Ellis-Monaghan ,  Brendan S. Harris ,  Vibhor Jain ,  Yves T. Ngu ,  Sebastian T. Ventrone

    IPC: G02B6/125 ,  G02B6/122 ,  G02B6/13 ,  G02B6/12

    CPC classification number: G02B6/125 ,  G02B6/12002 ,  G02B6/1228 ,  G02B6/13 ,  G02B6/30 ,  G02B2006/12061 ,  G02B2006/12147 ,  G02B2006/12195

    Abstract: Integrated optical structures include a first wafer layer, a first insulator layer directly connected to the top of the first wafer layer, a second wafer layer directly connected to the top of the first insulator layer, a second insulator layer directly connected to the top of the second wafer layer, and a third wafer layer directly connected to the top of the second insulator layer. Such structures include: a first optical waveguide positioned within the second wafer layer; an optical coupler positioned within the second wafer layer, the second insulator layer, and the third wafer layer; and a second optical waveguide positioned within the third wafer layer. The optical coupler transmits an optical beam from the first optical waveguide to the second optical waveguide through the second insulator layer.

    Abstract translation: 集成光学结构包括第一晶片层，直接连接到第一晶片层顶部的第一绝缘体层，直接连接到第一绝缘体层顶部的第二晶体层，直接连接到第一晶体层顶部的第二绝缘体层 第二晶片层和直接连接到第二绝缘体层的顶部的第三晶片层。 这种结构包括：位于第二晶片层内的第一光波导; 位于所述第二晶片层内的光耦合器，所述第二绝缘体层和所述第三晶片层; 以及位于第三晶片层内的第二光波导。 光耦合器通过第二绝缘体层将光束从第一光波导传输到第二光波导。

    VIDEO TRACKER HAVING DIGITAL SIGNAL PROCESSOR
    2.
    发明申请
    VIDEO TRACKER HAVING DIGITAL SIGNAL PROCESSOR 有权
    具有数字信号处理器的视频跟踪器

    公开(公告)号：US20160180543A1

    公开(公告)日：2016-06-23

    申请号：US14579562

    申请日：2014-12-22

    Applicant: International Business Machines Corporation

    Inventor： Ezra D.B. Hall ,  Aydin Suren ,  Clark N. Vandam ,  Sebastian T. Ventrone

    IPC: G06T7/20

    CPC classification number: G06T7/248 ,  G06K9/00973 ,  G06K9/6255 ,  G06T2207/10016 ,  G06T2207/30232 ,  G06T2207/30241

    Abstract: Various embodiments include solutions for analyzing three-dimensional video data. Various embodiments include a system having: at least one sensor for detecting at least one of object occlusion or drift in visual data; and a digital signal processor coupled with the at least one sensor, the digital signal processor having at least one database (DB) including target template sets for analyzing both object occlusion in visual data and drift in visual data, wherein the digital signal processor is configured to switch between one of the target template sets and a distinct target template set in the at least one DB based upon detection of the at least one of object occlusion or drift in the visual data.

    Abstract translation: 各种实施例包括用于分析三维视频数据的解决方案。 各种实施例包括具有：用于检测视觉数据中的物体遮挡或漂移中的至少一个的至少一个传感器的系统; 以及数字信号处理器，与所述至少一个传感器耦合，所述数字信号处理器具有包括目标模板集的至少一个数据库（DB），用于分析视觉数据中的对象遮挡和视觉数据中的漂移，其中配置数字信号处理器 基于在视觉数据中的对象遮挡或漂移中的至少一个的检测，在一个目标模板集和至少一个DB中设置的不同目标模板之间切换。

    Method and apparatus for secure and reliable computing
    5.
    发明授权
    Method and apparatus for secure and reliable computing 有权
    用于安全可靠计算的方法和装置

    公开(公告)号：US09043889B2

    公开(公告)日：2015-05-26

    申请号：US13786995

    申请日：2013-03-06

    Applicant: International Business Machines Corporation

    Inventor： Mariette Awad ,  Deanna C. Lim ,  Pascal A. Nsame ,  Daneyand J. Singley ,  Sebastian T. Ventrone

    IPC: G06F21/55 ,  G06F21/31

    CPC classification number: G06F21/55 ,  G06F21/31

    Abstract: In one embodiment, the invention is a method and apparatus for secure and reliable computing. One embodiment of an end-to-end security system for protecting a computing system includes a processor interface coupled to at least one of an application processor and an accelerator of the computing system, for receiving requests from the at least one of the application processor and the accelerator, a security processor integrating at least one embedded storage unit and connected to the processor interface with a tightly coupled memory unit for performing at least one of: authenticating, managing, monitoring, and processing the requests, and a data interface for communicating with a display, a network, and at least one embedded storage unit for securely holding at least one of data and programs used by the at least one of the application processor and the accelerator.

    Abstract translation: 在一个实施例中，本发明是用于安全和可靠计算的方法和装置。 用于保护计算系统的端到端安全系统的一个实施例包括耦合到计算系统的应用处理器和加速器中的至少一个的处理器接口，用于接收来自应用处理器的至少一个和 加速器，集成至少一个嵌入式存储单元并且与处理器接口连接的紧密耦合的存储器单元的安全处理器，用于执行以下至少一个：认证，管理，监视和处理请求，以及数据接口，用于与 显示器，网络和至少一个嵌入式存储单元，用于安全地保持应用处理器和加速器中的至少一个使用的数据和程序中的至少一个。

    Real-time adaptive voltage control of logic blocks
    6.
    发明授权
    Real-time adaptive voltage control of logic blocks 有权
    逻辑块的实时自适应电压控制

    公开(公告)号：US08988140B2

    公开(公告)日：2015-03-24

    申请号：US13930092

    申请日：2013-06-28

    Applicant: International Business Machines Corporation

    Inventor： Richard S. Graf ,  Joseph A. Iadanza ,  Faraydon Pakbaz ,  Jack R. Smith ,  Sebastian T. Ventrone ,  Ivan L. Wemple

    IPC: G05F1/10 ,  G05F1/46

    CPC classification number: G05F1/46 ,  G06F1/26

    Abstract: An integrated circuit includes logic regions and dynamically adjustable voltage controllers. A voltage controller connected to each logic region enables voltage adjustment while the chip is operating. Each voltage controller has a selector device connected to voltage input lines providing different voltages. A voltage sensor connected to the output of the selector device provides a supply voltage to one of the logic regions. A control circuit dynamically monitors the supply voltage, captures and stores a digital representation of the supply voltage during each cycle of a clock, and tracks variations over time, based on operation of the logic regions. When variations in the supply voltage exceed an operational threshold of one of the logic regions, the control circuit submits a request to a central controller. When the central controller grants permission, the control circuit dynamically adjusts the voltage by enabling the selector device to choose a different voltage input line.

    Abstract translation: 集成电路包括逻辑区域和动态可调电压控制器。 连接到每个逻辑区域的电压控制器在芯片工作时实现电压调节。 每个电压控制器具有连接到提供不同电压的电压输入线的选择器装置。 连接到选择器装置的输出的电压传感器向逻辑区域之一提供电源电压。 控制电路动态地监视电源电压，在时钟的每个周期期间捕获和存储电源电压的数字表示，并且基于逻辑区域的操作跟踪随时间的变化。 当电源电压的变化超过一个逻辑区域的操作阈值时，控制电路向中央控制器提交请求。 当中央控制器授权时，控制电路通过使选择器装置选择不同的电压输入线来动态地调节电压。

    REAL-TIME ADAPTIVE VOLTAGE CONTROL OF LOGIC BLOCKS
    7.
    发明申请
    REAL-TIME ADAPTIVE VOLTAGE CONTROL OF LOGIC BLOCKS 有权
    逻辑块的实时自适应电压控制

    公开(公告)号：US20150002217A1

    公开(公告)日：2015-01-01

    申请号：US13930092

    申请日：2013-06-28

    Applicant: International Business Machines Corporation

    Inventor： Richard S. Graf ,  Joseph A. Iadanza ,  Faraydon Pakbaz ,  Jack R. Smith ,  Sebastian T. Ventrone ,  Ivan L. Wemple

    IPC: G05F1/46

    CPC classification number: G05F1/46 ,  G06F1/26

    Abstract: An integrated circuit includes logic regions and dynamically adjustable voltage controllers. A voltage controller connected to each logic region enables voltage adjustment while the chip is operating. Each voltage controller has a selector device connected to voltage input lines providing different voltages. A voltage sensor connected to the output of the selector device provides a supply voltage to one of the logic regions. A control circuit dynamically monitors the supply voltage, captures and stores a digital representation of the supply voltage during each cycle of a clock, and tracks variations over time, based on operation of the logic regions. When variations in the supply voltage exceed an operational threshold of one of the logic regions, the control circuit submits a request to a central controller. When the central controller grants permission, the control circuit dynamically adjusts the voltage by enabling the selector device to choose a different voltage input line.

    Abstract translation: 集成电路包括逻辑区域和动态可调电压控制器。 连接到每个逻辑区域的电压控制器在芯片工作时实现电压调节。 每个电压控制器具有连接到提供不同电压的电压输入线的选择器装置。 连接到选择器装置的输出的电压传感器向逻辑区域之一提供电源电压。 控制电路动态地监视电源电压，在时钟的每个周期期间捕获和存储电源电压的数字表示，并且基于逻辑区域的操作跟踪随时间的变化。 当电源电压的变化超过一个逻辑区域的操作阈值时，控制电路向中央控制器提交请求。 当中央控制器授权时，控制电路通过使选择器装置选择不同的电压输入线来动态地调节电压。

Patent Agency Ranking