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    HEAT SPREADING LAYER INTEGRATED WITHIN A COMPOSITE IC DIE STRUCTURE AND METHODS OF FORMING THE SAME
    1.
    发明申请
    HEAT SPREADING LAYER INTEGRATED WITHIN A COMPOSITE IC DIE STRUCTURE AND METHODS OF FORMING THE SAME 有权

    公开(公告)号：US20210280492A1

    公开(公告)日：2021-09-09

    申请号：US17318887

    申请日：2021-05-12

    Applicant: Intel Corporation

    Inventor： Shawna Liff ,  Adel Elsherbini ,  Johanna Swan ,  Jimin Yao ,  Veronica Strong

    IPC: H01L23/373 ,  H01L21/768 ,  H01L25/065 ,  H01L23/48

    Abstract: A heat spreading material is integrated into a composite die structure including a first IC die having a first dielectric material and a first electrical interconnect structure, and a second IC die having a second dielectric material and a second electrical interconnect structure. The composite die structure may include a composite electrical interconnect structure comprising the first interconnect structure in direct contact with the second interconnect structure at a bond interface. The heat spreading material may be within at least a portion of a dielectric area through which the bond interface extends. The heat spreading material may be located within one or more dielectric materials surrounding the composite interconnect structure, and direct a flow of heat generated by one or more of the first and second IC dies.

    Multi-use package architecture
    3.
    发明授权
    Multi-use package architecture 有权

    公开(公告)号：US11929295B2

    公开(公告)日：2024-03-12

    申请号：US17677843

    申请日：2022-02-22

    Applicant: Intel Corporation

    Inventor： Eng Huat Goh ,  Jiun Hann Sir ,  Min Suet Lim ,  Richard C. Stamey ,  Chu Aun Lim ,  Jimin Yao

    IPC: H01L23/31 ,  H01L23/00 ,  H01L23/528 ,  H01L23/538

    CPC classification number: H01L23/3121 ,  H01L23/5283 ,  H01L23/5389 ,  H01L24/10 ,  H01L24/82 ,  H01L2924/01029 ,  H01L2924/1811

    Abstract: A semiconductor package is disclosed, which comprises a substrate, one or more dies on a first side of the substrate, and a plurality of interconnect structures having a first pitch and coupled to a second side of the substrate. The interconnect structures may attach the substrate to a board. The substrate may include a first interconnect layer having a second pitch. The first interconnect layer may be coupled to the one or more dies through second one or more interconnect layers. Third one or more interconnect layers between the first interconnect layer and the interconnect structures may translate the first pitch to the second pitch. The substrate may include a recess on a section of the second side of the substrate. The semiconductor package may further include one or more components within the recess and attached to the second side of the substrate.

    Mixed hybrid bonding structures and methods of forming the same
    6.
    发明授权
    Mixed hybrid bonding structures and methods of forming the same 有权

    公开(公告)号：US11183477B2

    公开(公告)日：2021-11-23

    申请号：US16584522

    申请日：2019-09-26

    Applicant: Intel Corporation

    Inventor： Shawna Liff ,  Adel Elsherbini ,  Johanna Swan ,  Nagatoshi Tsunoda ,  Jimin Yao

    IPC: H01L23/498 ,  H01L23/00 ,  H01L21/48

    Abstract: Embodiments include a mixed hybrid bonding structure comprising a composite dielectric layer, where the composite dielectric layer comprises an organic dielectric material having a plurality of inorganic filler material. One or more conductive substrate interconnect structures are within the composite dielectric layer. A die is on the composite dielectric layer, the die having one or more conductive die interconnect structures within a die dielectric material. The one or more conductive die interconnect structures are directly bonded to the one or more conductive substrate interconnect structures, and the inorganic filler material of the composite dielectric layer is bonded to the die dielectric material.

    Thermocompression bonding using plasma gas
    8.
    发明授权
    Thermocompression bonding using plasma gas 有权

    公开(公告)号：US10297567B2

    公开(公告)日：2019-05-21

    申请号：US14974823

    申请日：2015-12-18

    Applicant: Intel Corporation

    Inventor： Donglai David Lu ,  Jimin Yao ,  Amrita Mallik ,  George S. Kostiew ,  Shawna M. Liff

    IPC: H01L23/00

    Abstract: Described herein are devices and techniques for thermocompression bonding. A device can include a housing, a platform, and a plasma jet. The housing can define a chamber. The platform can be located within the chamber and can be proximate a thermocompression chip bonder. The plasma jet can be located proximate the platform. The plasma jet can be movable about the platform. The plasma jet can include a nozzle arranged to direct a plasma gas onto the platform. Also described are other embodiments for thermocompression bonding.

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