REDUCED ELECTRIC FIELD BY THICKENING DIELECTRIC ON THE DRAIN SIDE

    公开(公告)号:US20200279931A1

    公开(公告)日:2020-09-03

    申请号:US16651294

    申请日:2017-12-27

    申请人: Intel Corporation

    摘要: An apparatus is provided which comprises: a source and a drain with a channel region therebetween, the channel region comprising a semiconductor material, and a gate dielectric layer over at least a portion of the channel region, wherein the gate dielectric layer comprises a first thickness proximate to the source and a second thickness proximate to the drain, wherein the second thickness is greater than the first thickness, and wherein at least a portion of the gate dielectric layer comprises a linearly varying thickness over the channel region. Other embodiments are also disclosed and claimed.

    Sub-fin leakage control in semicondcutor devices

    公开(公告)号:US10930738B2

    公开(公告)日:2021-02-23

    申请号:US16611125

    申请日:2017-06-29

    申请人: INTEL CORPORATION

    摘要: A replacement fin in a heterogeneous FinFET transistor in which source and drain regions are grown in corresponding trenches that extend into a sub-fin region. This depth of the epitaxial source/drain regions, in combination with the selected materials, can reduce off-state leakage while also keeping high defect density portions out of the active portions of the source and drain. In one embodiment, materials are selected for the source and drain regions that have an energy band offset from the material selected for the substrate. This band offset between the source/drain material can further reduce sub-fin leakage.