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    MEMORY CIRCUIT AND METHOD OF OPERATING A MEMORY CIRCUIT
    4.
    发明申请
    MEMORY CIRCUIT AND METHOD OF OPERATING A MEMORY CIRCUIT 审中-公开

    公开(公告)号：US20180151244A1

    公开(公告)日：2018-05-31

    申请号：US15821871

    申请日：2017-11-24

    申请人： Infineon Technologies AG

    发明人： Jan Otterstedt ,  Robin Boch ,  Gerd Dirscherl ,  Bernd Meyer ,  Christian Peters ,  Steffen Sonnekalb

    IPC分类号： G11C29/02 ,  G11C7/06

    CPC分类号： G11C29/025 ,  G11C7/06 ,  G11C29/12005 ,  G11C29/702 ,  G11C29/82 ,  G11C2029/1202 ,  G11C2029/4402

    摘要： A memory circuit may include a plurality of electrically programmable memory cells arranged in a non-volatile memory cell array along a rows and columns, a plurality of word lines, each word line coupled with one or more memory cells, a plurality of non-volatile marking memory cells, wherein at least one word line of the plurality of word lines is associated with one or more marking memory cells, and a plurality of marking bit lines, each associated with marking memory cells, a plurality of marking source lines, each associated with marking memory cells, wherein, for marking memory cells, a physical connection from an associated marking source line and/or from an associated marking bit line to the marking memory cells defines those marking memory cells to a non-changeable state, wherein the marking memory cells are configured to identify the associated word line of respective marking memory cells in the non-changeable memory state.

    Data processing arrangement and method for data processing
    8.
    发明授权
    Data processing arrangement and method for data processing 有权

    公开(公告)号：US09652232B2

    公开(公告)日：2017-05-16

    申请号：US14341925

    申请日：2014-07-28

    申请人： Infineon Technologies AG

    发明人： Rainer Goettfert ,  Berndt Gammel ,  Gerd Dirscherl

    IPC分类号： G06F9/30 ,  G06F9/38 ,  G06F21/85

    CPC分类号： G06F9/3004 ,  G06F9/3885 ,  G06F21/85

    摘要： A processing arrangement having a first processing component and a second processing component is provided. The first component has a first output memory and a second output memory and a control device using the first memory storing a value to be output and the second memory stores a value that is based according to a prescribed function on the value. The control device stores a new value in the first memory whenever the second component has read a value stored in the first memory. The second component has a reading device reading the values stored in the first and second memories, and a processing device that checks whether the value read from the second memory is based according to the prescribed function on the value read from the first memory and, depending on the result, to process the value read from the first memory.