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    BOND ENHANCEMENT STRUCTURE IN MICROELECTRONICS FOR TRAPPING CONTAMINANTS DURING DIRECT-BONDING PROCESSES
    1.
    发明申请
    BOND ENHANCEMENT STRUCTURE IN MICROELECTRONICS FOR TRAPPING CONTAMINANTS DURING DIRECT-BONDING PROCESSES 有权

    公开(公告)号：US20220246564A1

    公开(公告)日：2022-08-04

    申请号：US17681019

    申请日：2022-02-25

    Applicant: INVENSAS BONDING TECHNOLOGIES, INC.

    Inventor： Guilian Gao ,  Javier A. DeLaCruz ,  Shaowu Huang ,  Liang Wang ,  Gaius Gillman Fountain, JR. ,  Rajesh Katkar ,  Cyprian Emeka Uzoh

    IPC: H01L23/00

    Abstract: Structures and techniques provide bond enhancement in microelectronics by trapping contaminants and byproducts during bonding processes, and arresting cracks. Example bonding surfaces are provided with recesses, sinks, traps, or cavities to capture small particles and gaseous byproducts of bonding that would otherwise create detrimental voids between microscale surfaces being joined, and to arrest cracks. Such random voids would compromise bond integrity and electrical conductivity of interconnects being bonded. In example systems, a predesigned recess space or predesigned pattern of recesses placed in the bonding interface captures particles and gases, reducing the formation of random voids, thereby improving and protecting the bond as it forms. The recess space or pattern of recesses may be placed where particles collect on the bonding surface, through example methods of determining where mobilized particles move during bond wave propagation. A recess may be repeated in a stepped reticule pattern at the wafer level, for example, or placed by an aligner or alignment process.

    Bond enhancement structure in microelectronics for trapping contaminants during direct-bonding processes
    2.
    发明授权
    Bond enhancement structure in microelectronics for trapping contaminants during direct-bonding processes 有权

    公开(公告)号：US11296044B2

    公开(公告)日：2022-04-05

    申请号：US16553535

    申请日：2019-08-28

    Applicant: Invensas Bonding Technologies, Inc.

    Inventor： Guilian Gao ,  Javier A. Delacruz ,  Shaowu Huang ,  Liang Wang ,  Gaius Gillman Fountain, Jr. ,  Rajesh Katkar ,  Cyprian Emeka Uzoh

    IPC: H01L23/00

    Abstract: Structures and techniques provide bond enhancement in microelectronics by trapping contaminants and byproducts during bonding processes, and arresting cracks. Example bonding surfaces are provided with recesses, sinks, traps, or cavities to capture small particles and gaseous byproducts of bonding that would otherwise create detrimental voids between microscale surfaces being joined, and to arrest cracks. Such random voids would compromise bond integrity and electrical conductivity of interconnects being bonded. In example systems, a predesigned recess space or predesigned pattern of recesses placed in the bonding interface captures particles and gases, reducing the formation of random voids, thereby improving and protecting the bond as it forms. The recess space or pattern of recesses may be placed where particles collect on the bonding surface, through example methods of determining where mobilized particles move during bond wave propagation. A recess may be repeated in a stepped reticule pattern at the wafer level, for example, or placed by an aligner or alignment process.

    Direct-bonded optoelectronic interconnect for high-density integrated photonics
    8.
    发明授权
    Direct-bonded optoelectronic interconnect for high-density integrated photonics 有权

    公开(公告)号：US11011503B2

    公开(公告)日：2021-05-18

    申请号：US16219693

    申请日：2018-12-13

    Applicant: Invensas Bonding Technologies, Inc.

    Inventor： Liang Wang ,  Rajesh Katkar

    IPC: H01L31/0203 ,  H01L25/16 ,  H01L33/48 ,  H01L23/00 ,  H01L23/48 ,  H01L33/62 ,  H01L23/538

    Abstract: Direct-bonded optoelectronic interconnects for high-density integrated photonics are provided. A combined electrical and optical interconnect enables direct-bonding of fully-processed optoelectronic dies or wafers to wafers with optoelectronic driver circuitry. The photonic devices may be III-V semiconductor devices. Direct-bonding to silicon or silicon-on-insulator (SOI) wafers enables the integration of photonics with high-density CMOS and other microelectronics packages. Each bonding surface has an optical window to be coupled by direct-bonding. Coplanar electrical contacts lie to the outside, or may circumscribe the respective optical windows and are also direct-bonded across the interface using metal-to-metal direct-bonding, without interfering with the optical windows. Direct hybrid bonding can accomplish both optical and electrical bonding in one overall operation, to mass-produce mLED video displays. The adhesive-free dielectric-to-dielectric direct bonding and solder-free metal-to-metal direct bonding creates high-density electrical interconnects on the same bonding interface as the bonded optical interconnect. Known-good-dies may be used, which is not possible conventionally, and photolithography over their top surfaces can scale to high density.

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