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公开(公告)号：US10770594B2
公开(公告)日：2020-09-08
申请号：US16034576
申请日：2018-07-13
IPC分类号： H01L29/78 , H01L29/66 , B29C48/21 , B29C48/49 , H01L29/423 , H01L29/06 , H01L29/10 , H01G4/20 , H01L29/08 , B29C37/00 , B32B3/08 , B32B7/02 , B32B27/00 , B32B27/08 , B32B27/28 , B32B27/30 , B32B27/32 , B32B27/34 , B32B27/36 , H01G4/005 , H01G4/14 , H01G4/228 , H01G4/30 , H01G4/33 , H01L21/8234 , H01L21/265 , H01L21/266 , H01L27/088 , B29K23/00 , B29K105/16 , B29K507/04 , B29L9/00 , B29L31/34
摘要： A gate-all around fin double diffused metal oxide semiconductor (DMOS) devices and methods of manufacture are disclosed. The method includes forming a plurality of fin structures from a substrate. The method further includes forming a well of a first conductivity type and a second conductivity type within the substrate and corresponding fin structures of the plurality of fin structures. The method further includes forming a source contact on an exposed portion of a first fin structure. The method further comprises forming drain contacts on exposed portions of adjacent fin structures to the first fin structure. The method further includes forming a gate structure in a dielectric fill material about the first fin structure and extending over the well of the first conductivity type.
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公开(公告)号：US10283959B2
公开(公告)日：2019-05-07
申请号：US14449559
申请日：2014-08-01
摘要： Circuits and methods of fabricating circuits that provide electrostatic discharge protection, as well as methods of protecting an integrated circuit from an electrostatic discharge event at an input/output pin. The protection circuit includes a silicon-controlled rectifier having a well and an anode in the well. The anode is coupled with the input/output pin. The protection circuit further includes a control circuit coupled with the well. The control circuit is configured to supply a first control logic voltage to the well that places the silicon-controlled rectifier in a blocking state, and a second control logic voltage to the well that places the silicon-controlled rectifier in a low impedance state. When placed in its low impedance state, the silicon-controlled rectifier is configured to divert current from the electrostatic discharge event at the input/output pin away from the integrated circuit.
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公开(公告)号：US10090301B2
公开(公告)日：2018-10-02
申请号：US15441353
申请日：2017-02-24
IPC分类号： H01L27/088 , H01L21/8234 , H01L21/265 , H01L21/266 , H01L29/10 , H01L29/06 , H01L29/78 , H01L29/66 , H01L29/423
摘要： A gate-all around fin double diffused metal oxide semiconductor (DMOS) devices and methods of manufacture are disclosed. The method includes forming a plurality of fin structures from a substrate. The method further includes forming a well of a first conductivity type and a second conductivity type within the substrate and corresponding fin structures of the plurality of fin structures. The method further includes forming a source contact on an exposed portion of a first fin structure. The method further comprises forming drain contacts on exposed portions of adjacent fin structures to the first fin structure. The method further includes forming a gate structure in a dielectric fill material about the first fin structure and extending over the well of the first conductivity type.
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4.发明授权Fin contacted electrostatic discharge (ESD) devices with improved heat distribution 有权翅片接触的静电放电（ESD）器件具有改善的热分布公开(公告)号：US09236374B2
公开(公告)日：2016-01-12
申请号：US14146421
申请日：2014-01-02
IPC分类号： H01L21/8238 , H01L27/02 , H01L29/66 , H01L23/367
CPC分类号： H01L27/0262 , H01L23/3677 , H01L27/0255 , H01L29/66545 , H01L29/785 , H01L2924/0002 , H01L2924/00
摘要： Fin contacted electrostatic discharge (ESD) devices with improved heat distribution and methods of manufacture are disclosed. The method includes forming a plurality of fins on a substrate which is aligned with at least one well region in the substrate. The method further includes forming at least one electrostatic discharge (ESD) device spanning two or more of the plurality of fins. The forming of the ESD device includes forming an epitaxial material spanning the two or more of the plurality of fins and forming one or more contacts on the epitaxial material.
摘要翻译： 公开了具有改进的热分布的翅片接触静电放电（ESD）装置和制造方法。 该方法包括在与衬底中的至少一个阱区对准的衬底上形成多个翅片。 该方法还包括形成跨越多个翅片中的两个或更多个的至少一个静电放电（ESD）装置。 ESD器件的形成包括形成跨越多个鳍中的两个或更多个的外延材料，并在外延材料上形成一个或多个触点。
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公开(公告)号：US11141902B2
公开(公告)日：2021-10-12
申请号：US16452836
申请日：2019-06-26
IPC分类号： H01L29/78 , B29C48/49 , H01L29/66 , B29C48/21 , H01L29/423 , H01L29/06 , H01L29/10 , H01G4/20 , H01L29/08 , B29C37/00 , B32B3/08 , B32B7/02 , B32B27/00 , B32B27/08 , B32B27/28 , B32B27/30 , B32B27/32 , B32B27/34 , B32B27/36 , H01G4/005 , H01G4/14 , H01G4/228 , H01G4/30 , H01G4/33 , H01L21/8234 , H01L21/265 , H01L21/266 , H01L27/088 , B29K23/00 , B29K105/16 , B29K507/04 , B29L9/00 , B29L31/34
摘要： A gate-all around fin double diffused metal oxide semiconductor (DMOS) devices and methods of manufacture are disclosed. The method includes forming a plurality of fin structures from a substrate. The method further includes forming a well of a first conductivity type and a second conductivity type within the substrate and corresponding fin structures of the plurality of fin structures. The method further includes forming a source contact on an exposed portion of a first fin structure. The method further comprises forming drain contacts on exposed portions of adjacent fin structures to the first fin structure. The method further includes forming a gate structure in a dielectric fill material about the first fin structure and extending over the well of the first conductivity type.
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公开(公告)号：US10658514B2
公开(公告)日：2020-05-19
申请号：US15890797
申请日：2018-02-07
IPC分类号： H01L29/78 , H01L29/66 , B29C48/21 , B29C48/49 , H01L29/423 , H01L29/06 , H01L29/10 , H01L29/08 , B32B27/00 , B32B27/08 , B32B27/28 , B32B27/30 , B32B27/32 , B32B27/34 , B32B27/36 , H01G4/005 , H01G4/20 , B29C37/00 , B32B3/08 , B32B7/02 , H01G4/14 , H01G4/228 , H01G4/30 , H01G4/33 , H01L21/8234 , H01L21/265 , H01L21/266 , H01L27/088 , B29K23/00 , B29K105/16 , B29K507/04 , B29L9/00 , B29L31/34
摘要： A gate-all around fin double diffused metal oxide semiconductor (DMOS) devices and methods of manufacture are disclosed. The method includes forming a plurality of fin structures from a substrate. The method further includes forming a well of a first conductivity type and a second conductivity type within the substrate and corresponding fin structures of the plurality of fin structures. The method further includes forming a source contact on an exposed portion of a first fin structure. The method further comprises forming drain contacts on exposed portions of adjacent fin structures to the first fin structure. The method further includes forming a gate structure in a dielectric fill material about the first fin structure and extending over the well of the first conductivity type.
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公开(公告)号：US10573754B2
公开(公告)日：2020-02-25
申请号：US15819672
申请日：2017-11-21
IPC分类号： H01L29/78 , H01L29/66 , B29C48/21 , B29C48/49 , H01L29/423 , H01L29/06 , H01L29/10 , H01L29/08 , B29C37/00 , B32B3/08 , B32B7/02 , B32B27/00 , B32B27/08 , B32B27/28 , B32B27/30 , B32B27/32 , B32B27/34 , B32B27/36 , H01G4/005 , H01G4/14 , H01G4/228 , H01G4/30 , H01G4/33 , H01L21/8234 , H01L21/265 , H01L21/266 , H01L27/088 , B29K23/00 , B29K105/16 , B29K507/04 , B29L9/00 , B29L31/34
摘要： A gate-all around fin double diffused metal oxide semiconductor (DMOS) devices and methods of manufacture are disclosed. The method includes forming a plurality of fin structures from a substrate. The method further includes forming a well of a first conductivity type and a second conductivity type within the substrate and corresponding fin structures of the plurality of fin structures. The method further includes forming a source contact on an exposed portion of a first fin structure. The method further comprises forming drain contacts on exposed portions of adjacent fin structures to the first fin structure. The method further includes forming a gate structure in a dielectric fill material about the first fin structure and extending over the well of the first conductivity type.
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公开(公告)号：US09978874B2
公开(公告)日：2018-05-22
申请号：US15402504
申请日：2017-01-10
CPC分类号： H01L29/7856 , B29C37/0025 , B29C47/065 , B29C47/56 , B29K2023/12 , B29K2105/16 , B29K2507/04 , B29K2995/0005 , B29K2995/0007 , B29L2009/003 , B29L2009/005 , B29L2031/34 , B32B3/08 , B32B7/02 , B32B27/00 , B32B27/08 , B32B27/28 , B32B27/306 , B32B27/308 , B32B27/32 , B32B27/34 , B32B27/36 , B32B2262/106 , B32B2264/105 , B32B2264/12 , B32B2270/00 , B32B2274/00 , B32B2307/202 , B32B2307/204 , B32B2307/206 , B32B2307/518 , B32B2307/732 , B32B2457/16 , H01G4/005 , H01G4/14 , H01G4/228 , H01G4/30 , H01G4/33 , H01L21/26513 , H01L21/266 , H01L21/823412 , H01L21/823431 , H01L21/823475 , H01L21/823481 , H01L21/823493 , H01L27/0886 , H01L29/0649 , H01L29/0653 , H01L29/0657 , H01L29/0696 , H01L29/086 , H01L29/0865 , H01L29/0869 , H01L29/0882 , H01L29/0886 , H01L29/1045 , H01L29/1095 , H01L29/4236 , H01L29/42376 , H01L29/4238 , H01L29/42392 , H01L29/66681 , H01L29/66704 , H01L29/66712 , H01L29/66734 , H01L29/66795 , H01L29/7802 , H01L29/7809 , H01L29/7811 , H01L29/7816 , H01L29/7825 , H01L29/7851 , H01L2029/7858
摘要： A gate-all around fin double diffused metal oxide semiconductor (DMOS) devices and methods of manufacture are disclosed. The method includes forming a plurality of fin structures from a substrate. The method further includes forming a well of a first conductivity type and a second conductivity type within the substrate and corresponding fin structures of the plurality of fin structures. The method further includes forming a source contact on an exposed portion of a first fin structure. The method further comprises forming drain contacts on exposed portions of adjacent fin structures to the first fin structure. The method further includes forming a gate structure in a dielectric fill material about the first fin structure and extending over the well of the first conductivity type.
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公开(公告)号：US09923096B2
公开(公告)日：2018-03-20
申请号：US15474096
申请日：2017-03-30
IPC分类号： H01L29/76 , H01L29/94 , H01L31/062 , H01L31/113 , H01L31/119 , H01L29/78 , H01L29/06 , H01L29/08 , H01L29/10 , H01L29/423 , H01L29/66
CPC分类号： H01L29/7856 , B29C37/0025 , B29C47/065 , B29C47/56 , B29K2023/12 , B29K2105/16 , B29K2507/04 , B29K2995/0005 , B29K2995/0007 , B29L2009/003 , B29L2009/005 , B29L2031/34 , B32B3/08 , B32B7/02 , B32B27/00 , B32B27/08 , B32B27/28 , B32B27/306 , B32B27/308 , B32B27/32 , B32B27/34 , B32B27/36 , B32B2262/106 , B32B2264/105 , B32B2264/12 , B32B2270/00 , B32B2274/00 , B32B2307/202 , B32B2307/204 , B32B2307/206 , B32B2307/518 , B32B2307/732 , B32B2457/16 , H01G4/005 , H01G4/14 , H01G4/228 , H01G4/30 , H01G4/33 , H01L21/26513 , H01L21/266 , H01L21/823412 , H01L21/823431 , H01L21/823475 , H01L21/823481 , H01L21/823493 , H01L27/0886 , H01L29/0649 , H01L29/0653 , H01L29/0657 , H01L29/0696 , H01L29/086 , H01L29/0865 , H01L29/0869 , H01L29/0882 , H01L29/0886 , H01L29/1045 , H01L29/1095 , H01L29/4236 , H01L29/42376 , H01L29/4238 , H01L29/42392 , H01L29/66681 , H01L29/66704 , H01L29/66712 , H01L29/66734 , H01L29/66795 , H01L29/7802 , H01L29/7809 , H01L29/7811 , H01L29/7816 , H01L29/7825 , H01L29/7851 , H01L2029/7858
摘要： A gate-all around fin double diffused metal oxide semiconductor (DMOS) devices and methods of manufacture are disclosed. The method includes forming a plurality of fin structures from a substrate. The method further includes forming a well of a first conductivity type and a second conductivity type within the substrate and corresponding fin structures of the plurality of fin structures. The method further includes forming a source contact on an exposed portion of a first fin structure. The method further comprises forming drain contacts on exposed portions of adjacent fin structures to the first fin structure. The method further includes forming a gate structure in a dielectric fill material about the first fin structure and extending over the well of the first conductivity type.
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公开(公告)号：US09590108B2
公开(公告)日：2017-03-07
申请号：US14995307
申请日：2016-01-14
CPC分类号： H01L29/7856 , B29C37/0025 , B29C47/065 , B29C47/56 , B29K2023/12 , B29K2105/16 , B29K2507/04 , B29K2995/0005 , B29K2995/0007 , B29L2009/003 , B29L2009/005 , B29L2031/34 , B32B3/08 , B32B7/02 , B32B27/00 , B32B27/08 , B32B27/28 , B32B27/306 , B32B27/308 , B32B27/32 , B32B27/34 , B32B27/36 , B32B2262/106 , B32B2264/105 , B32B2264/12 , B32B2270/00 , B32B2274/00 , B32B2307/202 , B32B2307/204 , B32B2307/206 , B32B2307/518 , B32B2307/732 , B32B2457/16 , H01G4/005 , H01G4/14 , H01G4/228 , H01G4/30 , H01G4/33 , H01L21/26513 , H01L21/266 , H01L21/823412 , H01L21/823431 , H01L21/823475 , H01L21/823481 , H01L21/823493 , H01L27/0886 , H01L29/0649 , H01L29/0653 , H01L29/0657 , H01L29/0696 , H01L29/086 , H01L29/0865 , H01L29/0869 , H01L29/0882 , H01L29/0886 , H01L29/1045 , H01L29/1095 , H01L29/4236 , H01L29/42376 , H01L29/4238 , H01L29/42392 , H01L29/66681 , H01L29/66704 , H01L29/66712 , H01L29/66734 , H01L29/66795 , H01L29/7802 , H01L29/7809 , H01L29/7811 , H01L29/7816 , H01L29/7825 , H01L29/7851 , H01L2029/7858
摘要： A gate-all around fin double diffused metal oxide semiconductor (DMOS) devices and methods of manufacture are disclosed. The method includes forming a plurality of fin structures from a substrate. The method further includes forming a well of a first conductivity type and a second conductivity type within the substrate and corresponding fin structures of the plurality of fin structures. The method further includes forming a source contact on an exposed portion of a first fin structure. The method further comprises forming drain contacts on exposed portions of adjacent fin structures to the first fin structure. The method further includes forming a gate structure in a dielectric fill material about the first fin structure and extending over the well of the first conductivity type.
摘要翻译： 公开了一种围绕翅片双扩散金属氧化物半导体（DMOS）的器件和制造方法。 该方法包括从衬底形成多个翅片结构。 该方法还包括在衬底内形成第一导电类型和第二导电类型的阱以及多个翅片结构中相应的翅片结构。 该方法还包括在第一鳍片结构的暴露部分上形成源极接触。 该方法还包括在相邻鳍片结构的暴露部分上形成到第一鳍片结构的漏极接触。 该方法还包括在介电填充材料周围形成围绕第一鳍结构并在第一导电类型的阱上延伸的栅极结构。
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