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公开(公告)号:US20240332159A1
公开(公告)日:2024-10-03
申请号:US18733459
申请日:2024-06-04
发明人: Jae Ung Lee , Yung Woo Lee , EunNaRa Cho , Dong Hyun Bang , Wook Choi , KooWoong Jeong , Byong Jin Kim , Min Chul Shin , Ho Jeong Lim , Ji Hyun Kim , Chang Hun Kim
IPC分类号: H01L23/498 , H01L21/48 , H01L23/00 , H01L23/13 , H01L23/31 , H01L23/50 , H01L23/538 , H01L25/065 , H01L25/16
CPC分类号: H01L23/49838 , H01L21/4853 , H01L21/4857 , H01L21/486 , H01L23/13 , H01L23/49822 , H01L23/49827 , H01L23/5389 , H01L25/16 , H01L23/3128 , H01L23/50 , H01L24/13 , H01L24/16 , H01L25/0655 , H01L2224/0401 , H01L2224/131 , H01L2224/13147 , H01L2224/16227 , H01L2224/16235 , H01L2224/16237 , H01L2924/1432 , H01L2924/1434 , H01L2924/15159 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19103 , H01L2924/19106
摘要: A semiconductor package and a method of manufacturing a semiconductor package. As a non-limiting example, various aspects of this disclosure provide a semiconductor package, and method of manufacturing thereof, that comprises a substrate having a first surface and a second surface opposite to the first surface, and comprising at least one first recess portion formed in a direction ranging from the first surface toward the second surface, a plurality of first recess conductive patterns formed in the first recess portion, and a first passive element inserted into the first recess portion of the substrate and having a first electrode and a second electrode electrically connected to the plurality of first recess conductive patterns.
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公开(公告)号:US12057434B2
公开(公告)日:2024-08-06
申请号:US17977164
申请日:2022-10-31
发明人: Jin Seong Kim , Edwin J. Adlam , Ludovico E. Bancod , Gi Jung Kim , Robert Lanzone , Jae Ung Lee , Yung Woo Lee , Mi Kyeong Choi
IPC分类号: H01L25/065 , H01L21/48 , H01L21/56 , H01L23/00 , H01L23/31 , H01L23/498 , H01L23/538 , H01L23/552 , H01L25/00
CPC分类号: H01L25/0652 , H01L21/4853 , H01L21/56 , H01L23/31 , H01L23/3128 , H01L23/49811 , H01L23/552 , H01L25/50 , H01L21/561 , H01L23/49827 , H01L23/5383 , H01L23/5384 , H01L24/16 , H01L24/32 , H01L24/48 , H01L24/73 , H01L24/97 , H01L2224/16227 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2224/97 , H01L2225/0651 , H01L2225/06513 , H01L2225/06517 , H01L2225/06537 , H01L2225/06548 , H01L2225/06572 , H01L2924/15153 , H01L2924/15159 , H01L2924/19105 , H01L2924/19106 , H01L2924/3025 , H01L2224/48091 , H01L2924/00014 , H01L2224/73265 , H01L2224/32145 , H01L2224/48227 , H01L2924/00012 , H01L2224/97 , H01L2224/83 , H01L2224/97 , H01L2224/81 , H01L2224/97 , H01L2224/85 , H01L2224/73265 , H01L2224/32225 , H01L2224/48227 , H01L2924/00 , H01L2224/73204 , H01L2224/16225 , H01L2224/32225 , H01L2924/00
摘要: A semiconductor package and a method of manufacturing a semiconductor package. As a non-limiting example, various aspects of this disclosure provide a semiconductor package, and method of manufacturing thereof, that comprises shielding on multiple sides thereof.
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公开(公告)号:US11572269B2
公开(公告)日:2023-02-07
申请号:US17086633
申请日:2020-11-02
发明人: Yung Woo Lee , Byung Jun Kim , Dong Hyun Bang , EunNaRa Cho , Adrian Arcedera , Jae Ung Lee
IPC分类号: B81B7/00
摘要: A semiconductor package using a polymer substrate is disclosed and may include a polymer cavity structure comprising first metal traces, a micro-electro mechanical systems (MEMS) device and a semiconductor die bonded to a first surface within a cavity of the cavity structure, and a substrate coupled to the cavity structure and comprising second metal traces coupled to the first metal traces. The substrate may enclose the MEMS device and the semiconductor die. Ground traces may be on external surfaces of the polymer cavity structure. Ball lands may be on a surface of the substrate opposite to a surface with the second metal traces. The first metal traces may extend from the first surface of the polymer cavity structure up a sidewall of the cavity and to conductive patterns on a top surface of the polymer cavity structure.
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公开(公告)号:US20210217725A1
公开(公告)日:2021-07-15
申请号:US17129015
申请日:2020-12-21
发明人: Jin Seong Kim , Edwin J. Adlam , Ludovico E. Bancod , Gi Jung Kim , Robert Lanzone , Jae Ung Lee , Yung Woo Lee , Mi Kyeong Choi
IPC分类号: H01L25/065 , H01L23/552 , H01L23/31 , H01L21/56 , H01L21/48 , H01L23/498 , H01L25/00
摘要: A semiconductor package and a method of manufacturing a semiconductor package. As a non-limiting example, various aspects of this disclosure provide a semiconductor package, and method of manufacturing thereof, that comprises shielding on multiple sides thereof.
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公开(公告)号:US12009289B2
公开(公告)日:2024-06-11
申请号:US17501857
申请日:2021-10-14
发明人: Jae Ung Lee , Yung Woo Lee , EunNaRa Cho , Dong Hyun Bang , Wook Choi , KooWoong Jeong , Byong Jin Kim , Min Chul Shin , Ho Jeong Lim , Ji Hyun Kim , Chang Hun Kim
IPC分类号: H01L23/498 , H01L21/48 , H01L23/00 , H01L23/13 , H01L23/31 , H01L23/50 , H01L23/538 , H01L25/065 , H01L25/16
CPC分类号: H01L23/49838 , H01L21/4853 , H01L21/4857 , H01L21/486 , H01L23/13 , H01L23/49822 , H01L23/49827 , H01L23/5389 , H01L25/16 , H01L23/3128 , H01L23/50 , H01L24/13 , H01L24/16 , H01L25/0655 , H01L2224/0401 , H01L2224/131 , H01L2224/13147 , H01L2224/16227 , H01L2224/16235 , H01L2224/16237 , H01L2924/1432 , H01L2924/1434 , H01L2924/15159 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19103 , H01L2924/19106 , H01L2224/131 , H01L2924/014 , H01L2924/00014
摘要: A semiconductor package and a method of manufacturing a semiconductor package. As a non-limiting example, various aspects of this disclosure provide a semiconductor package, and method of manufacturing thereof, that comprises a substrate having a first surface and a second surface opposite to the first surface, and comprising at least one first recess portion formed in a direction ranging from the first surface toward the second surface, a plurality of first recess conductive patterns formed in the first recess portion, and a first passive element inserted into the first recess portion of the substrate and having a first electrode and a second electrode electrically connected to the plurality of first recess conductive patterns.
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公开(公告)号:US20230118400A1
公开(公告)日:2023-04-20
申请号:US17977164
申请日:2022-10-31
发明人: Jin Seong Kim , Edwin J. Adlam , Ludovico E. Bancod , Gi Jung Kim , Robert Lanzone , Jae Ung Lee , Yung Woo Lee , Mi Kyeong Choi
IPC分类号: H01L25/065 , H01L23/552 , H01L23/31 , H01L21/56 , H01L21/48 , H01L23/498 , H01L25/00
摘要: A semiconductor package and a method of manufacturing a semiconductor package. As a non-limiting example, various aspects of this disclosure provide a semiconductor package, and method of manufacturing thereof, that comprises shielding on multiple sides thereof.
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公开(公告)号:US20210047172A1
公开(公告)日:2021-02-18
申请号:US17086633
申请日:2020-11-02
发明人: Yung Woo Lee , Byung Jun Kim , Dong Hyun Bang , EunNaRa Cho , Adrian Arcedera , Jae Ung Lee
IPC分类号: B81B7/00
摘要: A semiconductor package using a polymer substrate is disclosed and may include a polymer cavity structure comprising first metal traces, a micro-electro mechanical systems (MEMS) device and a semiconductor die bonded to a first surface within a cavity of the cavity structure, and a substrate coupled to the cavity structure and comprising second metal traces coupled to the first metal traces. The substrate may enclose the MEMS device and the semiconductor die. Ground traces may be on external surfaces of the polymer cavity structure. Ball lands may be on a surface of the substrate opposite to a surface with the second metal traces. The first metal traces may extend from the first surface of the polymer cavity structure up a sidewall of the cavity and to conductive patterns on a top surface of the polymer cavity structure.
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公开(公告)号:US20230257257A1
公开(公告)日:2023-08-17
申请号:US18106203
申请日:2023-02-06
发明人: Yung Woo Lee , Byung Jun Kim , Dong Hyun Bang , EunNaRa Cho , Adrian Arcedera , Jae Ung Lee
IPC分类号: B81B7/00
CPC分类号: B81B7/0061 , B81B2201/0257 , B81B2207/012 , H01L2224/48137 , H01L2224/73265 , H01L2924/15151
摘要: A semiconductor package using a polymer substrate is disclosed and may include a polymer cavity structure comprising first metal traces, a micro-electro mechanical systems (MEMS) device and a semiconductor die bonded to a first surface within a cavity of the cavity structure, and a substrate coupled to the cavity structure and comprising second metal traces coupled to the first metal traces. The substrate may enclose the MEMS device and the semiconductor die. Ground traces may be on external surfaces of the polymer cavity structure. Ball lands may be on a surface of the substrate opposite to a surface with the second metal traces. The first metal traces may extend from the first surface of the polymer cavity structure up a sidewall of the cavity and to conductive patterns on a top surface of the polymer cavity structure.
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公开(公告)号:US11488934B2
公开(公告)日:2022-11-01
申请号:US17129015
申请日:2020-12-21
发明人: Jin Seong Kim , Edwin J. Adlam , Ludovico E. Bancod , Gi Jung Kim , Robert Lanzone , Jae Ung Lee , Yung Woo Lee , Mi Kyeong Choi
IPC分类号: H01L25/065 , H01L23/552 , H01L23/31 , H01L21/56 , H01L21/48 , H01L23/498 , H01L25/00 , H01L23/00 , H01L23/538
摘要: A semiconductor package and a method of manufacturing a semiconductor package. As a non-limiting example, various aspects of this disclosure provide a semiconductor package, and method of manufacturing thereof, that comprises shielding on multiple sides thereof.
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