公开(公告)号：US09356228B2

公开(公告)日：2016-05-31

申请号：US14618534

申请日：2015-02-10

Applicant: Jeong Heon Park ,  Woo Chang Lim ,  Se Chung Oh ,  Young Hyun Kim ,  Sang Hwan Park ,  Jang Eun Lee

Inventor： Jeong Heon Park ,  Woo Chang Lim ,  Se Chung Oh ,  Young Hyun Kim ,  Sang Hwan Park ,  Jang Eun Lee

IPC: H01L21/14 ,  H01L43/08 ,  H01L43/10 ,  G06F13/16 ,  H01L43/02

CPC classification number: H01L43/08 ,  G06F13/16 ,  G11C11/161 ,  G11C11/1659 ,  H01L43/02 ,  H01L43/10

Abstract: Provided is a magnetic tunneling junction device including a first structure including a magnetic layer; a second structure including at least two extrinsic perpendicular magnetization structures, each including a magnetic layer and; a perpendicular magnetization inducing layer on the magnetic layer; and a tunnel barrier between the first and second structures.

公开(公告)号：US20150280108A1

公开(公告)日：2015-10-01

申请号：US14741446

申请日：2015-06-16

Applicant: JEONG-HEON PARK ,  KI-WOONG KIM ,  HEE-JU SHIN ,  JOON-MYOUNG LEE ,  WOO-JIN KIM ,  JAE-HOON KIM ,  SE-CHUNG OH ,  YUN-JAE LEE

Inventor： JEONG-HEON PARK ,  KI-WOONG KIM ,  HEE-JU SHIN ,  JOON-MYOUNG LEE ,  WOO-JIN KIM ,  JAE-HOON KIM ,  SE-CHUNG OH ,  YUN-JAE LEE

IPC: H01L43/02 ,  H01L27/22 ,  H01L23/528 ,  H01L43/08

CPC classification number: H01L43/02 ,  G11C11/161 ,  H01F10/30 ,  H01F10/32 ,  H01F10/3254 ,  H01F10/3272 ,  H01L23/528 ,  H01L27/222 ,  H01L43/08 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device is provided having a free layer and a pinned layer spaced apart from each other. A tunnel barrier layer is formed between the free layer and the pinned layer. The pinned layer may include a lower pinned layer, and an upper pinned layer spaced apart from the lower pinned layer. A spacer may be formed between the lower pinned layer and the upper pinned layer. A non-magnetic junction layer may be disposed adjacent to the spacer or between layers in the upper or lower pinned layer.

公开(公告)号：US20150102440A1

公开(公告)日：2015-04-16

申请号：US14579803

申请日：2014-12-22

Applicant: Jeong Heon PARK ,  Woo Chang LIM ,  Se Chung OH ,  Woo Jin KIM ,  Sang Hwan PARK ,  Jang Eun LEE

Inventor： Jeong Heon PARK ,  Woo Chang LIM ,  Se Chung OH ,  Woo Jin KIM ,  Sang Hwan PARK ,  Jang Eun LEE

IPC: H01L43/08 ,  H01L43/02

CPC classification number: H01L43/08 ,  G11C11/16 ,  G11C11/161 ,  G11C11/1659 ,  H01L27/222 ,  H01L43/02 ,  H01L43/10 ,  H01L43/12 ,  Y10S977/933 ,  Y10S977/935

Abstract: Provided is a magnetic tunneling junction device including a fixed magnetic structure; a free magnetic structure; and a tunnel barrier between the fixed magnetic structure and the free magnetic structure, at least one of the fixed magnetic structure and the free magnetic structure including a perpendicular magnetization preserving layer, a magnetic layer between the perpendicular magnetization preserving layer and the tunnel barrier, and a perpendicular magnetization inducing layer between the perpendicular magnetization preserving layer and the magnetic layer.

Abstract translation: 提供一种包括固定磁性结构的磁性隧道接合装置; 自由磁结构; 以及在所述固定磁性结构和所述自由磁性结构之间的隧道势垒，所述固定磁性结构和所述自由磁性结构中的至少一个包括垂直磁化保持层，所述垂直磁化保留层与所述隧道势垒之间的磁性层，以及 在垂直磁化保持层和磁性层之间的垂直磁化诱导层。

公开(公告)号：US20140297968A1

公开(公告)日：2014-10-02

申请号：US14306792

申请日：2014-06-17

Applicant: Jeong Heon PARK ,  Woo Chang LIM ,  Se Chung OH ,  Young Hyun KIM ,  Sang Hwan PARK ,  Jang Eun LEE

Inventor： Jeong Heon PARK ,  Woo Chang LIM ,  Se Chung OH ,  Young Hyun KIM ,  Sang Hwan PARK ,  Jang Eun LEE

IPC: H01L43/02 ,  G06F13/16 ,  H01L43/10

CPC classification number: H01L43/08 ,  G06F13/16 ,  G11C11/161 ,  G11C11/1659 ,  H01L43/02 ,  H01L43/10

Abstract: Provided is a magnetic tunneling junction device including a first structure including a magnetic layer; a second structure including at least two extrinsic perpendicular magnetization structures, each including a magnetic layer and; a perpendicular magnetization inducing layer on the magnetic layer; and a tunnel barrier between the first and second structures.

Abstract translation: 本发明提供一种包括具有磁性层的第一结构的磁性隧道接合装置; 包括至少两个外在垂直磁化结构的第二结构，每个包括磁性层; 磁性层上的垂直磁化诱导层; 以及第一和第二结构之间的隧道屏障。

公开(公告)号：US20120292724A1

公开(公告)日：2012-11-22

申请号：US13475520

申请日：2012-05-18

Applicant: Woo-Chang LIM ,  Jang-Eun LEE ,  Se-Chung OH ,  Woo-Jin KIM ,  Young-Hyun KIM ,  Jeong-Heon PARK

Inventor： Woo-Chang LIM ,  Jang-Eun LEE ,  Se-Chung OH ,  Woo-Jin KIM ,  Young-Hyun KIM ,  Jeong-Heon PARK

IPC: H01L29/82

CPC classification number: H01L43/08

Abstract: A magnetic tunnel junction element is provided. The magnetic tunnel junction element has first magnetic layer and second magnetic layer formed adjacent, e.g., on lower and upper portions of an insulating layer, respectively and each having a perpendicular magnetic anisotropy, a magnetic field adjustment layer formed on the second magnetic layer and having a perpendicular magnetic anisotropy, and a bather layer formed between the magnetic field adjustment layer and the second magnetic layer. The second magnetic layer and the magnetic field adjustment layer are magnetically decoupled from each other.

Abstract translation: 提供磁性隧道结元件。 磁性隧道结元件分别具有第一磁性层和第二磁性层，该第一磁性层和第二磁性层分别形成在例如绝缘层的下部和上部上并且各自具有垂直的磁各向异性，磁场调节层形成在第二磁性层上并具有 垂直磁各向异性，以及形成在磁场调整层和第二磁性层之间的沐浴层。 第二磁性层和磁场调节层彼此磁耦合。

公开(公告)号：US08247880B2

公开(公告)日：2012-08-21

申请号：US12372083

申请日：2009-02-17

Applicant: Se-Chung Oh ,  Jang-Eun Lee ,  Kyung-Tae Nam ,  Woo-Jin Kim ,  Dae-Kyom Kim ,  Jun-ho Jeong ,  Seung-Yeol Lee

Inventor： Se-Chung Oh ,  Jang-Eun Lee ,  Kyung-Tae Nam ,  Woo-Jin Kim ,  Dae-Kyom Kim ,  Jun-ho Jeong ,  Seung-Yeol Lee

IPC: H01L29/82 ,  G11C11/00

CPC classification number: H01L43/08 ,  G11C11/161 ,  G11C11/1673 ,  G11C11/1675 ,  H01L43/10

Abstract: A magnetic memory device and a method of fabricating the same. The magnetic memory device includes a free layer, a write element, and a read element. The write element changes the magnetization direction of the free layer, and the read element senses the magnetization direction of the free layer. Herein, the write element includes a current confinement layer having a width smaller than the minimum width of the free layer to locally increase the density of a current flowing through the write element.

Abstract translation: 一种磁存储器件及其制造方法。 磁存储器件包括自由层，写入元件和读取元件。 写入元件改变自由层的磁化方向，并且读取元件感测自由层的磁化方向。 这里，写元件包括具有小于自由层的最小宽度的宽度的电流限制层，以局部地增加流过写入元件的电流的密度。

公开(公告)号：US20120135543A1

公开(公告)日：2012-05-31

申请号：US13286630

申请日：2011-11-01

Applicant: Hee-Ju SHIN ,  Jun-Ho JEONG ,  Jang-Eun LEE ,  Se-Chung OH

Inventor： Hee-Ju SHIN ,  Jun-Ho JEONG ,  Jang-Eun LEE ,  Se-Chung OH

IPC: H01L43/12

CPC classification number: H01L43/12 ,  G11C11/161 ,  H01L27/228

Abstract: A method of fabricating a magnetic tunnel junction structure includes forming a magnetic tunnel junction layer on a substrate. A mask pattern is formed on a region of the second magnetic layer. A magnetic tunnel junction layer pattern and a sidewall dielectric layer pattern on at least one sidewall of the magnetic tunnel junction layer pattern are formed by performing at least one etch process and at least one oxidation process multiple times. The at least one etch process may include a first etch process to etch a portion of the magnetic tunnel junction layer using an inert gas and the mask pattern to form a first etch product. The at least one oxidation process may include a first oxidation process to oxidize the first etch product attached on an etched side of the magnetic tunnel junction layer.

Abstract translation: 制造磁性隧道结结构的方法包括在衬底上形成磁性隧道结层。 在第二磁性层的区域上形成掩模图案。 通过多次执行至少一个蚀刻工艺和至少一个氧化工艺来形成在磁性隧道结层图案的至少一个侧壁上的磁性隧道结层图案和侧壁电介质层图案。 所述至少一个蚀刻工艺可以包括使用惰性气体蚀刻磁性隧道结层的一部分并且掩模图案以形成第一蚀刻产物的第一蚀刻工艺。 所述至少一个氧化工艺可以包括第一氧化工艺以氧化附着在磁性隧道结层的蚀刻侧上的第一蚀刻产物。

公开(公告)号：US08083962B2

公开(公告)日：2011-12-27

申请号：US11783015

申请日：2007-04-05

Applicant: Jang-Eun Lee ,  Kyung-Tae Nam ,  Se-Chung Oh ,  Jun-Ho Jeong

Inventor： Jang-Eun Lee ,  Kyung-Tae Nam ,  Se-Chung Oh ,  Jun-Ho Jeong

IPC: B44C1/22 ,  H01B13/00 ,  C03C25/68

CPC classification number: H01L21/0337 ,  H01L21/0338 ,  H01L43/12 ,  H01L45/04 ,  H01L45/06 ,  H01L45/1675

Abstract: A method for forming a minute pattern includes depositing a material layer on a semiconductor substrate having a conductive region, forming a first mask layer on the material layer, forming a recess region in the first mask layer, performing layer processing to form a first mask pattern in the recess region, and etching the material layer to form a material layer pattern.

Abstract translation: 形成微小图案的方法包括在具有导电区域的半导体衬底上沉积材料层，在材料层上形成第一掩模层，在第一掩模层中形成凹陷区域，进行层处理以形成第一掩模图案 在凹陷区域中蚀刻材料层以形成材料层图案。

公开(公告)号：US08058097B2

公开(公告)日：2011-11-15

申请号：US12784230

申请日：2010-05-20

Applicant: Jang-Eun Lee ,  Dae-Kyom Kim ,  Jun-Ho Jeong ,  Se-Chung Oh ,  Kyung-Tae Nam ,  Hyun-Jun Sim

Inventor： Jang-Eun Lee ,  Dae-Kyom Kim ,  Jun-Ho Jeong ,  Se-Chung Oh ,  Kyung-Tae Nam ,  Hyun-Jun Sim

IPC: H01L21/36

CPC classification number: H01L45/04 ,  H01L27/2418 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/146 ,  H01L45/1633

Abstract: Methods of forming a resistive memory device include forming an insulation layer on a semiconductor substrate including a conductive pattern, forming a contact hole in the insulation layer to expose the conductive pattern, forming a lower electrode in the contact hole, forming a variable resistive oxide layer in the contact hole on the lower electrode, forming a middle electrode in the contact hole on the variable resistive oxide layer, forming a buffer oxide layer on the middle electrode and the insulation layer, and forming an upper electrode on the buffer oxide layer. Related resistive memory devices are also disclosed.

Abstract translation: 形成电阻性存储器件的方法包括在包括导电图案的半导体衬底上形成绝缘层，在绝缘层中形成接触孔以露出导电图案，在接触孔中形成下电极，形成可变电阻氧化物层 在下电极的接触孔中，在可变电阻氧化物层的接触孔中形成中间电极，在中间电极和绝缘层上形成缓冲氧化物层，在缓冲氧化物层上形成上电极。 还公开了相关的电阻式存储器件。

公开(公告)号：US20090135642A1

公开(公告)日：2009-05-28

申请号：US12358936

申请日：2009-01-23

Applicant: Hyun-Jo Kim ,  Kyung-Tae Nam ,  In-Gyu Baek ,  Se-Chung Oh ,  Jang-Eun Lee ,  Jun-Ho Jeong

Inventor： Hyun-Jo Kim ,  Kyung-Tae Nam ,  In-Gyu Baek ,  Se-Chung Oh ,  Jang-Eun Lee ,  Jun-Ho Jeong

IPC: G11C11/00 ,  G11C7/00 ,  G11C8/00

CPC classification number: G11C7/062 ,  G11C7/067 ,  G11C7/14 ,  G11C11/5664 ,  G11C11/5678 ,  G11C11/5685 ,  G11C13/0004 ,  G11C13/0007 ,  G11C13/0014 ,  G11C13/0016 ,  G11C13/004 ,  G11C2013/0054 ,  G11C2213/32 ,  G11C2213/79

Abstract: A Resistance based Random Access Memory (ReRAM) can include a sense amplifier circuit that includes a first input coupled to a bit line of a reference cell in a first block of the ReRAM responsive to a read operation to a second block.

Abstract translation: 基于电阻的随机存取存储器（ReRAM）可以包括读出放大器电路，其响应于对第二块的读取操作，包括耦合到ReRAM的第一块中的参考单元的位线的第一输入。