Semiconductor device
    2.
    发明授权

    公开(公告)号:US10811386B2

    公开(公告)日:2020-10-20

    申请号:US15704996

    申请日:2017-09-14

    摘要: The present technology relates to a semiconductor device. The semiconductor device comprises: a plurality of dies stacked on top of each other, each of the dies comprising a first major surface, an IO conductive pattern on the first major surface and extended to a minor surface substantially perpendicular to the major surfaces to form at least one IO electrical contact on the minor surface, and the plurality of dies aligned so that the corresponding minor surfaces of all dies substantially coplanar with respect to each other to form a common flat sidewall, and a plurality of IO routing traces formed over the sidewall and at least partially spaced away from the sidewall. The plurality of IO routing traces are spaced apart from each other in a first direction on the sidewall, and each of IO routing traces is electrically connected to a respective IO electrical contact and extended across the sidewall in a second direction substantially perpendicular to the first direction on the sidewall.

    ANGLED DIE SEMICONDUCTOR DEVICE
    4.
    发明申请

    公开(公告)号:US20180342483A1

    公开(公告)日:2018-11-29

    申请号:US15623598

    申请日:2017-06-15

    摘要: A semiconductor device is disclosed mounted at an angle on a signal carrier medium such as a printed circuit board. The semiconductor device includes a stack of semiconductor die stacked in a stepped offset configuration. The die stack may then be encapsulated in a block of molding compound. The molding compound may then be singulated with slanted cuts along two opposed edges. The slanted edge may then be drilled to expose the electrical contacts on each of the semiconductor die. The slanted edge may then be positioned against a printed circuit board having solder or other conductive bumps so that the conductive bumps engage the semiconductor die electrical contacts in the drilled holes. The device may then be heated to reflow and connect the electrical contacts to the conductive bumps.

    Semiconductor package and method of fabricating semiconductor package

    公开(公告)号:US11031371B2

    公开(公告)日:2021-06-08

    申请号:US15704984

    申请日:2017-09-14

    摘要: The present technology relates to a semiconductor package. The semiconductor package comprises: a first component comprising a plurality of first dies stacked on top of each other, each of first dies comprising at least one side surface and an electrical contact exposed on the side surface, and the plurality of first dies aligned so that the corresponding side surfaces of all first dies substantially coplanar with respect to each other to form a common sidewall; a first conductive pattern formed over the sidewall and at least partially spaced away from the sidewall, the first conductive pattern electrically interconnecting the electrical contacts of the plurality of first dies; at least one second component; and a second conductive pattern formed on a surface of the second component, the second conductive pattern affixed and electrically connected to the first conductive pattern formed over the sidewall of the first component.