公开(公告)号：US20100176869A1

公开(公告)日：2010-07-15

申请号：US12686613

申请日：2010-01-13

Applicant: Koji Horie ,  Minoru Nagata

Inventor： Koji Horie ,  Minoru Nagata

IPC: H01L37/00

CPC classification number: H03F1/302 ,  H03F3/195 ,  H03F3/245 ,  H03F2200/447 ,  H03F2200/451

Abstract: A temperature compensation circuit according to an embodiment of the present invention includes a bias circuit configured to output a bias current having a current value increasing in proportion to an absolute temperature in a low-temperature region in which a temperature is lower than a predetermined temperature, and having a greater current value than the current value proportional to the absolute temperature in a high-temperature region in which the temperature is equal to or greater than the predetermined temperature, and a transistor having a control terminal supplied with the bias current. The bias circuit includes a first current generating circuit configured to generate a first current increasing in proportion to the absolute temperature, a second current generating circuit configured to generate a second current that does not flow in the low-temperature region and flows in the high-temperature region, and a control circuit configured to control the second current and having a connection terminal capable of being connected with an external resistor for adjusting a magnitude of the second current, and is configured to generate a third current by adding the first current to the second current, and output the bias current depending on or equal to the third current.

Abstract translation: 根据本发明实施例的温度补偿电路包括：偏置电路，被配置为输出与温度低于预定温度的低温区域中的绝对温度成比例地增加的电流值的偏置电流， 并且具有比在温度等于或大于预定温度的高温区域中与绝对温度成比例的电流值的电流值更大的电流值，以及具有提供偏置电流的控制端子的晶体管。 偏置电路包括：第一电流产生电路，被配置为产生与绝对温度成比例的第一电流;第二电流产生电路，被配置为产生不在低温区域中流动并在高温区域中流动的第二电流; 温度区域和控制电路，被配置为控制第二电流并具有能够与外部电阻器连接的连接端子，用于调整第二电流的大小，并且被配置为通过将第一电流加到第一电流中来产生第三电流 并且根据或等于第三电流输出偏置电流。

公开(公告)号：US5842123A

公开(公告)日：1998-11-24

申请号：US425736

申请日：1995-04-20

Applicant: Nobuo Hamamoto ,  Tadashi Onishi ,  Tatsundo Suzuki ,  Minoru Nagata ,  Kenichi Mizuishi ,  Yosuke Tyojamori

Inventor： Nobuo Hamamoto ,  Tadashi Onishi ,  Tatsundo Suzuki ,  Minoru Nagata ,  Kenichi Mizuishi ,  Yosuke Tyojamori

IPC: G08B3/10 ,  G08B5/22 ,  H04M3/533 ,  H04M11/02 ,  H04W88/18 ,  H04M11/10

CPC classification number: H04W88/187 ,  G08B3/1025 ,  G08B5/229 ,  H04M11/022 ,  H04M3/533 ,  H04M2203/609

Abstract: A radio paging system with voice transfer function for transmitting a voice message input from an ordinary push-button telephone set to a small-sized receive-only unsophisticated radio pager. A paging station is provided to transmit by radio the message from a telephone network to the radio pager as follows: voice information constituting the message is first converted from analog to digital format, compressed, stored in memory, and scrambled by a privacy function part for transmission. The radio pager in turn demodulates the received information, stores it in memory, retrieves a necessary message therefrom as designated, descrambles the designated message from scrambled state, expands the message from compressed state, and outputs the message as an audible output. In this manner, the user carrying the radio pager is able to get the message from the caller without the risk of being tapped by a third party.

公开(公告)号：US4860086A

公开(公告)日：1989-08-22

申请号：US26254

申请日：1987-03-16

Applicant: Tohru Nakamura ,  Masahiko Ogirima ,  Kazuo Nakazato ,  Takao Miyazaki ,  Naoki Yamamoto ,  Minoru Nagata ,  Shojiro Sugaki, deceased

Inventor： Tohru Nakamura ,  Masahiko Ogirima ,  Kazuo Nakazato ,  Takao Miyazaki ,  Naoki Yamamoto ,  Minoru Nagata ,  Shojiro Sugaki, deceased

IPC: H01L23/485 ,  H01L23/532

CPC classification number: H01L23/53271 ,  H01L23/485 ,  H01L2924/0002

Abstract: A semiconductor device is constructed so that an insulation film is provided in regions other than a protruding portion of a substrate. A polycrystalline silicon layer and a metal silicide layer are formed over said insulation film to provide a multi-layer structure, and a take-out portion for at least one of the emitter, base, and collector members of a bipolar transistor provided in the mesa region is constituted by a film of this multi-layer structure. By virtue of the use of metal silicide together with the polycrystalline silicon, a very low resistance is achieved which enhances the device's operating speed. Further, the metal silicide is separated from the protruding portion of the substrate by a portion of the polycrystalline silicon to provide a smooth interface with the substrate. This smooth interface significantly reduces crystal defects in the single crystal substrate.

Abstract translation: 构造半导体器件，使得绝缘膜设置在除了衬底的突出部分之外的区域中。 在所述绝缘膜上形成多晶硅层和金属硅化物层以提供多层结构，以及设置在台面中的双极晶体管的发射极，基极和集电极构件中的至少一个的取出部分 区域由该多层结构的膜构成。 由于金属硅化物与多晶硅一起使用，所以实现了非常低的电阻，这增强了器件的工作速度。 此外，金属硅化物通过多晶硅的一部分与衬底的突出部分分离，以提供与衬底的平滑界面。 这种平滑的界面显着地减少了单晶衬底中的晶体缺陷。

公开(公告)号：US4857769A

公开(公告)日：1989-08-15

申请号：US143385

申请日：1988-01-13

Applicant: Nobuo Kotera ,  Kiichi Yamashita ,  Taizo Kinoshita ,  Hirotoshi Tanaka ,  Satoshi Tanaka ,  Minoru Nagata

Inventor： Nobuo Kotera ,  Kiichi Yamashita ,  Taizo Kinoshita ,  Hirotoshi Tanaka ,  Satoshi Tanaka ,  Minoru Nagata

IPC: H03K19/003

CPC classification number: H03K19/00384

Abstract: This invention relates to a threshold voltage detection circuit for detecting the threshold voltage of field effect transistors (FETs) and to a semiconductor circuit capable of a stable operation irrespective of the fluctuation of the threshold voltage by utilizing this threshold voltage detection circuit. The source-drain path of first FET is connected in series with that of second FET having substantially the same threshold voltage as that of the first FET and the conductances of these first and second FETs are set to a predetermined ratio to generate a voltage drop associated with the threshold voltage in the first FET. This voltage drop can be used for detecting the threshold voltage and for level-shifting. The output of the series connection of the first and second FETs is applied to the gate of a constant current FET having the same threshold voltage as that of the first and second FETs and the drain current of the constant current FET can thus be set irrespective of the fluctuation of the threshold voltage.

Abstract translation: 本发明涉及一种阈值电压检测电路，用于通过利用该阈值电压检测电路来检测场效应晶体管（FET）的阈值电压和能够稳定工作的半导体电路，而与阈值电压的波动无关。 第一FET的源极 - 漏极路径与具有与第一FET基本相同的阈值电压的第二FET的源极 - 漏极路径串联连接，并且将这些第一和第二FET的电导设置为预定的比率以产生相关的电压降 与第一FET中的阈值电压。 该电压降可用于检测阈值电压和电平转换。 第一和第二FET的串联连接的输出被施加到具有与第一和第二FET相同的阈值电压的恒流FET的栅极，因此可以设定恒定电流FET的漏极电流，而不管 阈值电压的波动。

公开(公告)号：US4825281A

公开(公告)日：1989-04-25

申请号：US435552

申请日：1982-10-21

Applicant: Kazuo Nakazato ,  Tohru Nakamura ,  Masatoshi Matsuda ,  Takao Miyazaki ,  Tokuo Kure ,  Takahiro Okabe ,  Minoru Nagata

Inventor： Kazuo Nakazato ,  Tohru Nakamura ,  Masatoshi Matsuda ,  Takao Miyazaki ,  Tokuo Kure ,  Takahiro Okabe ,  Minoru Nagata

IPC: H01L21/8222 ,  H01L21/033 ,  H01L21/3205 ,  H01L21/331 ,  H01L27/06 ,  H01L29/423 ,  H01L29/70 ,  H01L29/72 ,  H01L29/73 ,  H01L29/732 ,  H01L29/735 ,  H01L23/48 ,  H01L29/04 ,  H01L29/34

CPC classification number: H01L29/66272 ,  H01L21/033 ,  H01L29/42304 ,  H01L29/72 ,  H01L29/732 ,  H01L29/735

Abstract: A semiconductor device wherein the active regions of a transistor are formed in an opening provided in an insulating film, electrodes are led out by a polycrystalline silicon film formed on the insulating film, and the upper surfaces of the emitter and base electrodes and the exposed surface of the insulating film are substantially even.

Abstract translation: 一种半导体器件，其中晶体管的有源区形成在设置在绝缘膜中的开口中，电极由形成在绝缘膜上的多晶硅膜引出，发射极和基极的上表面和暴露表面 的绝缘膜基本上均匀。

公开(公告)号：US08427227B2

公开(公告)日：2013-04-23

申请号：US13403121

申请日：2012-02-23

Applicant: Koji Horie ,  Minoru Nagata

Inventor： Koji Horie ,  Minoru Nagata

IPC: G05F3/02 ,  H03K17/14

CPC classification number: H03F1/302 ,  H03F3/195 ,  H03F3/245 ,  H03F2200/447 ,  H03F2200/451

Abstract: In one embodiment, a temperature compensation circuit includes a bias circuit configured to output a bias current having a current value increasing in proportion to an absolute temperature in a low-temperature region, and having a greater current value than the current value proportional to the absolute temperature in a high-temperature region, and a transistor which is supplied with the bias current. The bias circuit includes first to third transistors, a fourth transistor through which a first current flows, a fifth transistor, a sixth transistor through which a second current flows, and a control circuit having a connection terminal capable of being connected with an external resistor for adjusting a magnitude of the second current. The bias circuit generates a third current by adding the first current to the second current, and outputs the bias current that is the third current or a fourth current depending on the third current.

Abstract translation: 在一个实施例中，温度补偿电路包括偏置电路，该偏置电路被配置为输出具有与低温区域中的绝对温度成比例增加的电流值的偏置电流，并且具有比与绝对值成比例的电流值更大的电流值 高温区域的温度，以及被提供偏置电流的晶体管。 偏置电路包括第一至第三晶体管，第一电流流经的第四晶体管，第五晶体管，第二电流流经的第六晶体管，以及具有能够与外部电阻器连接的连接端子的控制电路， 调整第二电流的大小。 偏置电路通过将第一电流加到第二电流来产生第三电流，并根据第三电流输出作为第三电流或第四电流的偏置电流。

公开(公告)号：US20110304387A1

公开(公告)日：2011-12-15

申请号：US13046953

申请日：2011-03-14

Applicant: Kenichi Hirashiki ,  Norio Hagiwara ,  Tsutomu Nakashima ,  Minoru Nagata

Inventor： Kenichi Hirashiki ,  Norio Hagiwara ,  Tsutomu Nakashima ,  Minoru Nagata

IPC: G05F1/10

CPC classification number: G05F3/262

Abstract: In one embodiment, a current mirror circuit includes first to fourth insulated gate field effect transistors (FETs), and a bias circuit. The gate electrodes of the first and second FETs are connected to each other. The source electrode of the third FET is connected to the drain electrode of the first FET, and the drain electrode of the third FET is connected to the gate electrodes of the first and second FETs and a current input terminal. The gate electrode of the fourth FET is connected to the gate electrode of the third FET, the source electrode of the fourth FET is connected to the drain electrode of the second FET, and the drain electrode of the fourth FET becomes a current output terminal. The bias circuit is configured to provide a bias voltage to the gate electrodes of the third and fourth FETs.

Abstract translation: 在一个实施例中，电流镜电路包括第一至第四绝缘栅场效应晶体管（FET）和偏置电路。 第一和第二FET的栅电极彼此连接。 第三FET的源电极连接到第一FET的漏电极，第三FET的漏电极连接到第一和第二FET的栅电极以及电流输入端。 第四FET的栅电极与第三FET的栅电极连接，第四FET的源电极与第二FET的漏极连接，第四FET的漏极成为电流输出端。 偏置电路被配置为向第三和第四FET的栅电极提供偏置电压。

公开(公告)号：US07487225B2

公开(公告)日：2009-02-03

申请号：US09926007

申请日：2000-12-05

Applicant: Mitsuhiro Nishibe ,  Hirokazu Tsuchiya ,  Takuya Kajikawa ,  Atsushi Sakaida ,  Minoru Nagata ,  Motohiro Ohama ,  Yoshimichi Kitaya ,  Yoshihiro Tamura

Inventor： Mitsuhiro Nishibe ,  Hirokazu Tsuchiya ,  Takuya Kajikawa ,  Atsushi Sakaida ,  Minoru Nagata ,  Motohiro Ohama ,  Yoshimichi Kitaya ,  Yoshihiro Tamura

IPC: G06F15/16 ,  G06F11/30 ,  H04L9/00

CPC classification number: G06F21/10 ,  G06F2221/2117 ,  G06Q30/02 ,  H04L63/102 ,  H04L2463/101

Abstract: On receiving from a personal computer (1) a request for transmitting data for displaying a picture for inputting a user's profile in association with an MGID and an APID for specifying the personal computer (1), an EMD registration server (3) selects data recorded in correspondence to the APID based on the received APID and transmits the selected data to the personal computer (1). The EMD registration server (3) receivers the user's profile inputted based on the data from the personal computer (1) and records the user's profile in correspondence to the MGID.

Abstract translation: 在从个人计算机（1）接收到用于发送用于显示用于与MGID相关联地输入用户简档的图像的数据的请求和用于指定个人计算机（1）的APID的情况下，EMD注册服务器（3）选择记录的数据 基于所接收的APID对应于APID，并将所选择的数据发送到个人计算机（1）。 EMD注册服务器（3）基于来自个人计算机（1）的数据接收输入的用户简档，并记录与MGID对应的用户简档。

公开(公告)号：US20050076096A1

公开(公告)日：2005-04-07

申请号：US09926007

申请日：2000-12-05

Applicant: Mitsuhiro Nishibe ,  Hirokazu Tsuchiya ,  Takuya Kajikawa ,  Atsushi Sakaida ,  Minoru Nagata ,  Motohiro Ohama ,  Yoshimichi Kitaya ,  Yoshihiro Tamura

Inventor： Mitsuhiro Nishibe ,  Hirokazu Tsuchiya ,  Takuya Kajikawa ,  Atsushi Sakaida ,  Minoru Nagata ,  Motohiro Ohama ,  Yoshimichi Kitaya ,  Yoshihiro Tamura

IPC: G06F21/10 ,  G06Q30/00 ,  H04L29/06 ,  G06F15/16 ,  G06F15/167

CPC classification number: G06F21/10 ,  G06F2221/2117 ,  G06Q30/02 ,  H04L63/102 ,  H04L2463/101

Abstract: On receiving from a personal computer (1) a request for transmitting data for displaying a picture for inputting a user's profile in association with an MGID and an APID for specifying the personal computer (1), an EMD registration server (3) selects data recorded in correspondence to the APID based on the received APID and transmits the selected data to the personal computer (1). The EMD registration server (3) receivers the user's profile inputted based on the data from the personal computer (1) and records the user's profile in correspondence to the MGID.

Abstract translation: 在从个人计算机（1）接收到发送用于显示用于与MGID相关联地输入用户简档的图像的数据的请求和用于指定个人计算机（1）的APID时，EMD注册服务器（3）选择记录的数据 基于所接收的APID对应于APID，并将所选择的数据发送到个人计算机（1）。 EMD注册服务器（3）基于来自个人计算机（1）的数据接收输入的用户简档，并记录与MGID对应的用户简档。

公开(公告)号：US5949484A

公开(公告)日：1999-09-07

申请号：US913161

申请日：1997-09-08

Applicant: Yuichiro Nakaya ,  Yukio Fujii ,  Minoru Nagata ,  Masanori Maruyama

Inventor： Yuichiro Nakaya ,  Yukio Fujii ,  Minoru Nagata ,  Masanori Maruyama

IPC: H04N7/14 ,  H04N7/56 ,  H04N19/00 ,  H04N19/102 ,  H04N19/105 ,  H04N19/107 ,  H04N19/12 ,  H04N19/132 ,  H04N19/134 ,  H04N19/196 ,  H04N19/46 ,  H04N19/50 ,  H04N19/503 ,  H04N19/61 ,  H04N19/625 ,  H04N19/70 ,  H04N21/442 ,  H04N7/12 ,  H04M11/00

CPC classification number: H04N7/56 ,  H04N19/162 ,  H04N19/164 ,  H04N19/176 ,  H04N19/61 ,  H04N7/142 ,  H04N19/107 ,  H04N2007/145

Abstract: The electric power consumption by a terminal used for communication of multimedia information is controlled by changing the quality of transmitted information. The terminal is provided with input (101, 102, 106 and 107) through which such information as images and sounds is inputted, channel control sections (123 and 124) which output the input information to channels and receive information from the channels, output (103, 104, 108, 109 and 105) which output the information received from the channels in the form of images, sounds, etc., a codec (110) which is provided between the input and output and the control sections, encodes the input information in one of multiple encoding modes in which electric power is differently consumed, and decodes the information inputted from the channels, and a control section (133) which controls the selection of the encoding mode. This terminal can continue information communication for a required period of time at minimum power consumption at the sacrifice of the quality of transmitted information. Therefore, either the power consumption or quality of information can be adequately selected according to the transmission.

Abstract translation: PCT No.PCT / JP95 / 00376 Sec。 371日期：1997年9月8日 102（e）1997年9月8日PCT PCT 1995年3月8日PCT公布。 WO96 / 27987 PCT公开号 日期1996年9月12日通过改变发送信息的质量来控制用于多媒体信息通信的终端的电力消耗。 终端设置有输入图像和声音等信息的输入（101,102,106和107），将输入信息输出到信道并从信道接收信息的信道控制部分（123和124），输出（ 103,104,108,109和105），其以图像，声音等的形式输出从信道接收的信息，提供在输入和输出与控制部分之间的编解码器（110），对输入 以不同的方式消耗电力的多种编码模式之一的信息，以及对从该信道输入的信息进行解码;以及控制部，控制编码模式的选择。 该终端可以在牺牲所发送的信息的质量的情况下，以最小功耗持续所需时间段的信息通信。 因此，可以根据传输来适当地选择功耗或信息质量。