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    Reference buffer circuit, analog-to-digital converter system, receiver, base station and mobile device
    1.
    发明授权
    Reference buffer circuit, analog-to-digital converter system, receiver, base station and mobile device 有权

    公开(公告)号：US12074606B2

    公开(公告)日：2024-08-27

    申请号：US17131811

    申请日：2020-12-23

    申请人： Intel Corporation

    发明人： Daniel Gruber ,  Christian Lindholm ,  Martin Clara ,  Giacomo Cascio

    IPC分类号： H03M1/08 ,  H03K19/003 ,  H03K19/0185 ,  H04B1/12

    CPC分类号： H03M1/0827 ,  H03K19/00384 ,  H03K19/018578 ,  H04B1/12

    摘要： A reference buffer circuit for an analog-to-digital converter is provided. The reference buffer circuit includes a first input node configured to receive a first bias signal of a first polarity from a first signal line. Further, the reference buffer circuit includes a second input node configured to receive a second bias signal of a second polarity from a second signal line. Additionally, the reference buffer circuit includes a first output node configured to output a first reference signal of the first polarity. A first buffer amplifier is coupled between the first input node and the first output node. The reference buffer circuit includes in addition a second output node configured to output a second reference signal of the second polarity. A second buffer amplifier is coupled between the second input node and the second output node. Further, the reference buffer circuit includes a first coupling path comprising a first capacitive element. The first coupling path is coupled between the first output node and the second input node. In addition, the reference buffer circuit includes a second coupling path comprising a second capacitive element. The second coupling path is coupled between the second output node and the first input node.

    NBTI protection for differential pairs
    3.
    发明授权
    NBTI protection for differential pairs 有权

    公开(公告)号：US11777500B2

    公开(公告)日：2023-10-03

    申请号：US17969778

    申请日：2022-10-20

    申请人： TEXAS INSTRUMENTS INCORPORATED

    发明人： Damien Valentin Thibault Telenczak ,  Mikhail Valeryevich Ivanov

    IPC分类号： H03K19/003 ,  H03K19/173 ,  H03K19/0185 ,  H03F1/52

    CPC分类号： H03K19/00384 ,  H03F1/523 ,  H03K19/0185 ,  H03K19/1737

    摘要： In examples, a system includes a differential input device having a first input and a second input. The system includes a window generator configured to output, at a first output, a first voltage above a reference voltage and a second voltage, at a second output, below the reference voltage. The system includes a multiplexer coupled to the first output and the second output, the multiplexer configured to receive the first voltage, the second voltage, and an input voltage. The system includes a selector coupled to the multiplexer and configured to select the first voltage, the second voltage, or the input voltage based on a value of the input voltage, where the selector is configured to cause the multiplexer to provide the selected voltage to the first input of the differential input device, where a voltage source provides the reference voltage to the second input of the differential input device.

    VOLTAGE FLUCTUATION DETECTION CIRCUIT
    4.
    发明公开
    VOLTAGE FLUCTUATION DETECTION CIRCUIT 审中-公开

    公开(公告)号：US20230308096A1

    公开(公告)日：2023-09-28

    申请号：US18185395

    申请日：2023-03-17

    申请人： ABLIC Inc.

    发明人： Tomoki HIKICHI ,  Takahiro ITO

    IPC分类号： H03K17/22 ,  H03K19/003 ,  H03K19/0185

    CPC分类号： H03K17/223 ,  H03K19/00384 ,  H03K19/018507

    摘要： A voltage fluctuation detection circuit includes: a source voltage decrease detection circuit configured to detect a decrease in voltage of a first power supply which outputs a first voltage and to output the result of detection as a voltage decrease detection signal using a second voltage which is lower than the voltage of the first power supply; an erroneous detection prevention circuit configured to detect an increase in voltage of the first power supply and to output the result of detection as a voltage increase detection signal using the second voltage; and a transistor configured to mask outputting of the voltage decrease detection signal in a period in which the increase in voltage of the first power supply is being detected based on the voltage increase detection signal.

    Slew-rate compensated transistor turnoff system
    5.
    发明授权
    Slew-rate compensated transistor turnoff system 有权

    公开(公告)号：US11671098B2

    公开(公告)日：2023-06-06

    申请号：US17700354

    申请日：2022-03-21

    申请人： TEXAS INSTRUMENTS INCORPORATED

    发明人： Kyoung Min Lee ,  James M. Walden ,  Brian Linehan ,  Yang Zhang

    IPC分类号： H03K19/003 ,  H03K17/16 ,  H03K17/081 ,  H03K17/0812

    CPC分类号： H03K19/00384 ,  H03K17/0812 ,  H03K17/08104 ,  H03K17/08122 ,  H03K17/163 ,  H03K17/166

    摘要： In a transistor turnoff system, a transistor control circuit is configured to adjust a control voltage at a transistor control output responsive to a comparison signal at a control input. The control voltage has a slew rate. A comparator has a comparator output and first and second comparator inputs. The first comparator input is coupled to the transistor control output. The comparator is configured to: provide the comparison signal at the comparator output based on a reference voltage at the second comparator input; and deactivate the transistor control circuit by changing a state of the comparison signal responsive to the control voltage falling below the reference voltage. A slew-rate compensator is configured to increase the reference voltage by a compensation voltage that compensates for a time delay of the comparator or the transistor control circuit. The compensation voltage is proportional to the slew rate.

    COMMUNICATION INTERFACE WITH AUTOMATIC ADAPTATION OF THE LEVEL OF THE INPUT SIGNAL
    7.
    发明申请
    COMMUNICATION INTERFACE WITH AUTOMATIC ADAPTATION OF THE LEVEL OF THE INPUT SIGNAL 审中-公开

    公开(公告)号：US20190222213A1

    公开(公告)日：2019-07-18

    申请号：US15307775

    申请日：2015-03-24

    申请人： Inside Secure

    发明人： Francois Rudolff ,  Julien Roche

    IPC分类号： H03K19/0185 ,  G06F1/30 ,  H01L27/02 ,  H04L25/02 ,  G11C5/06 ,  H03K19/003

    CPC分类号： H03K19/018507 ,  G06F1/305 ,  G11C5/066 ,  H01L27/0248 ,  H03K19/00369 ,  H03K19/00384 ,  H04L25/0296

    摘要： A communication interface comprises an input terminal (Rx) for receiving a logic signal from a remote interface (IF2); a logic level discriminator (12) coupled to the input terminal; a peak detector (14) connected to store the peak value of the signal at the input terminal; and a voltage follower (16) connected to the discriminator for providing an auxiliary supply voltage (Vdd2′) based on the value provided by the peak detector. An electrostatic discharge (ESD) protection device is further provided, including a first diode (D1) and an RC-circuit forming the peak detector, connected in series between the input terminal (Rx) and a first power supply line (Vss1); a transistor (MN1) connected between the first power supply line (Vss1) and the input terminal (Rx) through the first diode (D1) or a second diode (D1′); and inverter (42) configured to turn on the transistor when the voltage across the capacitor of the RC-circuit is less than a threshold.

    OUTPUT DRIVER COMPRISING MOS SWITHCES WITH ADJUSTABLE BACK BIASING
    8.
    发明申请
    OUTPUT DRIVER COMPRISING MOS SWITHCES WITH ADJUSTABLE BACK BIASING 审中-公开

    公开(公告)号：US20180191346A1

    公开(公告)日：2018-07-05

    申请号：US15673306

    申请日：2017-08-09

    申请人： GN Hearing A/S

    发明人： Dan Raun JENSEN ,  Per ASBECK

    IPC分类号： H03K19/003 ,  H03K19/00 ,  H01L27/04 ,  H03K5/134 ,  H01L27/02

    CPC分类号： H03K19/00384 ,  H01L27/0251 ,  H01L27/04 ,  H03F3/181 ,  H03F3/2171 ,  H03F3/2173 ,  H03K5/134 ,  H03K19/0005

    摘要： The present disclosure relates to an integrated circuit output driver, e.g. operating in class-D, for driving an audio transducer. The integrated circuit output driver comprises a first half-bridge driver comprising a first PMOS transistor and a first NMOS transistor connected in series between positive and negative supply voltage rails. A first body terminal is connected to a body of the first PMOS transistor for receipt of a first back bias voltage and a second body terminal connected to a body of the first NMOS transistor for receipt of a second back bias voltage. The integrated circuit output driver comprises a bias voltage generator configured to adjust at least one of the first back bias voltage and the second back bias voltage to control on-resistance of the first PMOS transistor and/or the first NMOS transistor. The integrated circuit output driver is well-suited for hearing aids, headsets and other audio devices.