公开(公告)号：US09202777B2

公开(公告)日：2015-12-01

申请号：US12131037

申请日：2008-05-30

申请人： Lionel Chien Hui Tay ,  Seng Guan Chow ,  Zigmund Ramirez Camacho

发明人： Lionel Chien Hui Tay ,  Seng Guan Chow ,  Zigmund Ramirez Camacho

IPC分类号： H01L21/48 ,  H01L23/495 ,  H01L23/31 ,  H01L23/00

CPC分类号： H01L23/49541 ,  H01L23/3107 ,  H01L24/48 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor package system includes: providing a leadframe having inner frame bars, outer frame bars, a die pad, tiebars, and rows of leads, the inner frame bars being coplanar with outer frame bars; attaching a semiconductor chip to the die pad; attaching bond wires between the semiconductor chip and the rows of leads; encapsulating the semiconductor chip, the bond wires, the inner frame bars, the outer frame bars, the die pad, the tiebars, and the rows of leads in an encapsulant; cutting a groove to remove the inner frame bars; and singulating the leadframe and the encapsulant to remove the outer frame bars.

摘要翻译： 半导体封装系统包括：提供具有内框架条，外框架条，管芯焊盘，拉杆和一排引线的引线框架，内框架杆与外框架杆共面; 将半导体芯片附接到芯片焊盘; 在半导体芯片和引线列之间附加接合线; 在封装材料中封装半导体芯片，接合线，内框架条，外框架条，管芯焊盘，拉杆和引线列; 切割凹槽以移除内框架条; 并且分离引线框和密封剂以去除外框架条。

公开(公告)号：US08957515B2

公开(公告)日：2015-02-17

申请号：US11936516

申请日：2007-11-07

申请人： Zigmund Ramirez Camacho ,  Henry Descalzo Bathan ,  Abelardo Jr. Hadap Advincula ,  Lionel Chien Hui Tay

发明人： Zigmund Ramirez Camacho ,  Henry Descalzo Bathan ,  Abelardo Jr. Hadap Advincula ,  Lionel Chien Hui Tay

IPC分类号： H01L23/48 ,  H01L23/495 ,  H01L21/48 ,  H01L23/31 ,  H01L23/00

CPC分类号： H01L23/49548 ,  H01L21/4832 ,  H01L23/3107 ,  H01L23/49541 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/05554 ,  H01L2224/32245 ,  H01L2224/45014 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/10162 ,  H01L2924/14 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

摘要： An integrated circuit package system includes: forming an array of external interconnects with an intersecting region between the external interconnects; removing the intersecting region for forming an isolation hole between the external interconnects; mounting an integrated circuit die over the external interconnects; connecting an internal interconnect between the integrated circuit die and the external interconnects; and forming a package encapsulation over the integrated circuit die with the external interconnects partially exposed.

摘要翻译： 集成电路封装系统包括：形成具有外部互连之间的相交区域的外部互连阵列; 去除用于在外部互连之间形成隔离孔的交叉区域; 在外部互连上安装集成电路管芯; 连接集成电路管芯和外部互连件之间的内部互连; 以及在所述集成电路管芯上形成封装封装，所述外部互连部分露出。

公开(公告)号：US08810017B2

公开(公告)日：2014-08-19

申请号：US13536321

申请日：2012-06-28

申请人： Zigmund Ramirez Camacho ,  Dioscoro A. Merilo ,  Henry Descalzo Bathan ,  Lionel Chien Hui Tay

发明人： Zigmund Ramirez Camacho ,  Dioscoro A. Merilo ,  Henry Descalzo Bathan ,  Lionel Chien Hui Tay

IPC分类号： H01L23/495

CPC分类号： H01L24/11 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/28 ,  H01L23/3107 ,  H01L23/3128 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/81 ,  H01L24/85 ,  H01L24/92 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/105 ,  H01L2221/68372 ,  H01L2224/16145 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48227 ,  H01L2224/48229 ,  H01L2224/48247 ,  H01L2224/4899 ,  H01L2224/49 ,  H01L2224/731 ,  H01L2224/732 ,  H01L2224/73207 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/8101 ,  H01L2224/81011 ,  H01L2224/81194 ,  H01L2224/81801 ,  H01L2224/81986 ,  H01L2224/85203 ,  H01L2224/85205 ,  H01L2224/8592 ,  H01L2224/85951 ,  H01L2224/92 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06582 ,  H01L2225/1023 ,  H01L2225/1029 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/37 ,  H01L2924/37001 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2924/0105 ,  H01L2924/3512 ,  H01L2924/0665 ,  H01L2924/00014 ,  H01L2224/13 ,  H01L2224/45 ,  H01L2924/00012

摘要： A method of manufacture of an integrated circuit package system includes: attaching a first die to a first die pad; connecting electrically a second die to the first die through a die interconnect positioned between the first die and the second die; connecting a first lead adjacent the first die pad to the first die; connecting a second lead to the second die, the second lead opposing the first lead and adjacent the second die; and providing a molding material around the first die, the second die, the die interconnect, the first lead and the second lead, with a portion of the first lead exposed.

摘要翻译： 集成电路封装系统的制造方法包括：将第一管芯附接到第一管芯焊盘; 通过位于所述第一管芯和所述第二管芯之间的管芯互连件将第二管芯电连接到所述第一管芯; 将与所述第一管芯焊盘相邻的第一引线连接到所述第一管芯; 将第二引线连接到所述第二管芯，所述第二引线与所述第一引线相对并且邻近所述第二管芯; 以及在所述第一裸片，所述第二裸片，芯片互连，所述第一引线和所述第二引线周围提供模制材料，所述第一引线的一部分被暴露。

公开(公告)号：US08722457B2

公开(公告)日：2014-05-13

申请号：US11965383

申请日：2007-12-27

申请人： Zigmund R. Camacho ,  Dioscoro A. Merilo ,  Lionel Chien Hui Tay ,  Henry Descalzo Bathan

发明人： Zigmund R. Camacho ,  Dioscoro A. Merilo ,  Lionel Chien Hui Tay ,  Henry Descalzo Bathan

IPC分类号： H01L21/00

CPC分类号： H01L23/5389 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/49861 ,  H01L23/5385 ,  H01L24/48 ,  H01L25/03 ,  H01L25/50 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/18165 ,  H01L2924/19041 ,  H01L2924/19104 ,  H01L2924/19107 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： In a semiconductor package, a substrate has an active surface containing a plurality of active circuits. An adhesive layer is formed over the active surface of the substrate, and a known good unit (KGU) is mounted to the adhesive layer. An interconnect structure electrically connects the KGU and active circuits on the substrate. The interconnect structure includes a wire bond between a contact pad on the substrate and a contact pad on the KGU, a redistribution layer on a back surface of the substrate, opposite the active surface, a through hole via (THV) through the substrate that electrically connects the redistribution layer and wire bond, and solder bumps formed in electrical contact with the redistribution layer. The KGU includes a KGU substrate for supporting the KGU, a semiconductor die disposed over the KGU substrate, and an encapsulant formed over the semiconductor die.

摘要翻译： 在半导体封装中，衬底具有包含多个有源电路的有源表面。 在基板的有效表面上形成粘合剂层，并且将已知的良好单元（KGU）安装到粘合剂层上。 互连结构将KGU和衬底上的有源电路电连接。 所述互连结构包括在所述衬底上的接触焊盘和所述KGU上的接触焊盘之间的引线接合，所述衬底的背面上的与所述有源表面相对的再分布层，穿过所述衬底的通孔通孔（THV） 连接再分布层和引线键合，以及与再分布层电接触形成的焊料凸块。 KGU包括用于支撑KGU的KGU基板，设置在KGU基板上的半导体管芯，以及形成在半导体管芯上的密封剂。

公开(公告)号：US08664038B2

公开(公告)日：2014-03-04

申请号：US12328759

申请日：2008-12-04

申请人： Zigmund Ramirez Camacho ,  Arnel Senosa Trasporto ,  Lionel Chien Hui Tay ,  Jose Alvin Caparas

发明人： Zigmund Ramirez Camacho ,  Arnel Senosa Trasporto ,  Lionel Chien Hui Tay ,  Jose Alvin Caparas

IPC分类号： H01L21/00

CPC分类号： H01L23/49575 ,  H01L23/49503 ,  H01L23/49548 ,  H01L24/28 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/32245 ,  H01L2224/45014 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48145 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01076 ,  H01L2924/01082 ,  H01L2924/07802 ,  H01L2924/0781 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2924/0665 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/05599

摘要： A method of manufacture of an integrated circuit packaging system includes: forming a package paddle and a terminal adjacent to the package paddle; mounting a stack paddle over the package paddle with the stack paddle at a non-center offset with the package paddle; mounting a stack integrated circuit over the stack paddle; and encapsulating the stack integrated circuit and the stack paddle.

摘要翻译： 一种集成电路封装系统的制造方法，包括：形成封装焊盘和邻近封装焊盘的端子; 将堆叠桨安装在封装桨上方，堆叠桨与封装桨形件在非中心偏移处; 在堆叠桨上安装堆叠集成电路; 并封装堆叠集成电路和堆叠桨。

公开(公告)号：US08502371B2

公开(公告)日：2013-08-06

申请号：US11965550

申请日：2007-12-27

申请人： Zigmund Ramirez Camacho ,  Lionel Chien Hui Tay ,  Jairus Legaspi Pisigan ,  Henry Descalzo Bathan

发明人： Zigmund Ramirez Camacho ,  Lionel Chien Hui Tay ,  Jairus Legaspi Pisigan ,  Henry Descalzo Bathan

IPC分类号： H01L23/48 ,  H01L21/00

CPC分类号： H01L23/495 ,  H01L23/552 ,  H01L2924/0002 ,  H01L2924/00

摘要： An integrated circuit package system including: forming a die pad, wherein the die pad has a tiebar at a corner; forming a lead wherein the lead is connected to the tiebar; connecting an integrated circuit die to the die pad; and forming an encapsulation, having an edge, over the integrated circuit die with the lead extending from and beyond the edge.

摘要翻译： 一种集成电路封装系统，包括：形成管芯焊盘，其中所述管芯焊盘在拐角处具有连接杆; 形成引线，其中引线连接到连接杆; 将集成电路管芯连接到管芯焊盘; 以及在所述集成电路裸片上形成具有边缘的封装，所述引线从所述边缘延伸出并超过所述边缘。

公开(公告)号：US08389332B2

公开(公告)日：2013-03-05

申请号：US13197122

申请日：2011-08-03

申请人： Zigmund Ramirez Camacho ,  Henry Descalzo Bathan ,  Lionel Chien Hui Tay ,  Jose Alvin Caparas

发明人： Zigmund Ramirez Camacho ,  Henry Descalzo Bathan ,  Lionel Chien Hui Tay ,  Jose Alvin Caparas

IPC分类号： H01L21/00

CPC分类号： H01L23/49551 ,  H01L23/49541 ,  H01L23/49548 ,  H01L24/48 ,  H01L24/49 ,  H01L24/83 ,  H01L24/85 ,  H01L2224/32245 ,  H01L2224/45014 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/49109 ,  H01L2224/73265 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01074 ,  H01L2924/01076 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/078 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2924/00012

摘要： A method of manufacture of an integrated circuit packaging system includes: providing a lead frame having a die attach paddle, an isolated pad, and a connector; attaching an integrated circuit die to the die attach paddle and the connector; forming an encapsulation over the integrated circuit die, the connector, the die attach paddle, and the isolated pad; and singulating the connector and the die attach paddle whereby the isolated pads are electrically isolated.

摘要翻译： 一种制造集成电路封装系统的方法，包括：提供具有管芯附接焊盘，隔离焊盘和连接器的引线框架; 将集成电路管芯连接到管芯附接焊盘和连接器; 在集成电路管芯，连接器，管芯附接焊盘和隔离焊盘上形成封装; 并且分离连接器和管芯附接板，由此隔离焊盘被电隔离。

公开(公告)号：US20120261808A1

公开(公告)日：2012-10-18

申请号：US13536321

申请日：2012-06-28

申请人： Zigmund Ramirez Camacho ,  Dioscoro A. Merilo ,  Henry Descalzo Bathan ,  Lionel Chien Hui Tay

发明人： Zigmund Ramirez Camacho ,  Dioscoro A. Merilo ,  Henry Descalzo Bathan ,  Lionel Chien Hui Tay

IPC分类号： H01L23/495 ,  H01L21/50

CPC分类号： H01L24/11 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/28 ,  H01L23/3107 ,  H01L23/3128 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/81 ,  H01L24/85 ,  H01L24/92 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/105 ,  H01L2221/68372 ,  H01L2224/16145 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48227 ,  H01L2224/48229 ,  H01L2224/48247 ,  H01L2224/4899 ,  H01L2224/49 ,  H01L2224/731 ,  H01L2224/732 ,  H01L2224/73207 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/8101 ,  H01L2224/81011 ,  H01L2224/81194 ,  H01L2224/81801 ,  H01L2224/81986 ,  H01L2224/85203 ,  H01L2224/85205 ,  H01L2224/8592 ,  H01L2224/85951 ,  H01L2224/92 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06582 ,  H01L2225/1023 ,  H01L2225/1029 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/37 ,  H01L2924/37001 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2924/0105 ,  H01L2924/3512 ,  H01L2924/0665 ,  H01L2924/00014 ,  H01L2224/13 ,  H01L2224/45 ,  H01L2924/00012

摘要： A method of manufacture of an integrated circuit package system includes: attaching a first die to a first die pad; connecting electrically a second die to the first die through a die interconnect positioned between the first die and the second die; connecting a first lead adjacent the first die pad to the first die; connecting a second lead to the second die, the second lead opposing the first lead and adjacent the second die; and providing a molding material around the first die, the second die, the die interconnect, the first lead and the second lead, with a portion of the first lead exposed.

摘要翻译： 集成电路封装系统的制造方法包括：将第一管芯附接到第一管芯焊盘; 通过位于所述第一管芯和所述第二管芯之间的管芯互连件将第二管芯电连接到所述第一管芯; 将与所述第一管芯焊盘相邻的第一引线连接到所述第一管芯; 将第二引线连接到所述第二管芯，所述第二引线与所述第一引线相对并且邻近所述第二管芯; 以及在所述第一裸片，所述第二裸片，芯片互连，所述第一引线和所述第二引线周围提供模制材料，所述第一引线的一部分被暴露。

公开(公告)号：US20120241966A1

公开(公告)日：2012-09-27

申请号：US13069744

申请日：2011-03-23

申请人： Zigmund Ramirez Camacho ,  Henry Descalzo Bathan ,  Lionel Chien Hui Tay

发明人： Zigmund Ramirez Camacho ,  Henry Descalzo Bathan ,  Lionel Chien Hui Tay

IPC分类号： H01L23/498 ,  H01L21/60

CPC分类号： H01L24/97 ,  H01L21/4832 ,  H01L21/56 ,  H01L21/561 ,  H01L21/568 ,  H01L23/3107 ,  H01L23/49551 ,  H01L23/49582 ,  H01L24/73 ,  H01L25/105 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2224/85001 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099

摘要： An integrated circuit packaging system and method of manufacture thereof includes: an L-plated lead; a die conductively connected to the L-plated lead; and an encapsulant encapsulating the L-plated lead and the die.

摘要翻译： 集成电路封装系统及其制造方法包括：镀L引线; 导电地连接到L镀层导线的模具; 以及封装L镀层引线和芯片的密封剂。

公开(公告)号：US08174098B2

公开(公告)日：2012-05-08

申请号：US12911042

申请日：2010-10-25

申请人： Lionel Chien Hui Tay ,  Govindiah G. Badakere ,  Zigmund R. Camacho

发明人： Lionel Chien Hui Tay ,  Govindiah G. Badakere ,  Zigmund R. Camacho

IPC分类号： H01L21/00

CPC分类号： H01L23/525 ,  H01L23/3677 ,  H01L23/5226 ,  H01L23/552 ,  H01L24/48 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06527 ,  H01L2225/06551 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/04941 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device has a conductive via formed around a perimeter of the semiconductor die. First and second conductive layers are formed on opposite sides of the semiconductor die and thermally connected to the conductive via. An insulating layer is formed over the semiconductor die. Openings in the insulating layer expose the first conductive layer and a thermal dissipation region of semiconductor die. A thermal via is formed through the insulating layer to the first conductive layer. A thermally conductive layer is formed over the thermal dissipation region and thermal via. A thermal conduction path is formed from the thermal dissipation region through the thermally conductive layer, thermal via, first conductive layer, conductive via, and second conductive layer. The thermal conduction path terminates in an external thermal ground point. The thermally conductive layer provides shielding for electromagnetic interference.

摘要翻译： 半导体器件具有围绕半导体管芯的周边形成的导电通孔。 第一和第二导电层形成在半导体管芯的相对侧上并与导电通孔热连接。 在半导体管芯上形成绝缘层。 绝缘层中的开口露出半导体芯片的第一导电层和散热区域。 通过绝缘层向第一导电层形成热通孔。 在散热区域和热通孔上形成导热层。 热传导路径通过导热层，热通孔，第一导电层，导电通孔和第二导电层由散热区域形成。 热传导路径终止于外部热接地点。 导热层为电磁干扰提供屏蔽。