公开(公告)号：US20050214980A1

公开(公告)日：2005-09-29

申请号：US10807527

申请日：2004-03-24

Applicant: Hei Shiu ,  Kam Lee ,  Ho Wong

Inventor： Hei Shiu ,  Kam Lee ,  Ho Wong

IPC: H01L21/44 ,  H01L21/56 ,  H01L23/31

CPC classification number: H01L21/568 ,  H01L21/56 ,  H01L23/3107 ,  H01L24/48 ,  H01L24/97 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/18165 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A method of packaging an integrated circuit die (12) includes the steps of providing a foil sheet (30) and forming a layer of solder (32) on a first side of the foil sheet. A first side of the integrated circuit die is attached to the solder on the foil sheet. The first side of the die has a layer of metal (34) on it and a second, opposing side of the die includes bonding pads (14). The bonding pads are electrically connected to the solder on the foil sheet with wires (16). The die, the electrical connections, and the first side of the foil sheet are encapsulated with a mold compound (20). The foil sheet is separated from the die and the wires, which forms a packaged integrated circuit (10).

Abstract translation: 封装集成电路管芯（12）的方法包括以下步骤：在箔片的第一侧上提供箔片（30）并形成焊料层（32）。 集成电路管芯的第一侧附着在箔片上的焊料上。 模具的第一面在其上具有一层金属（34），并且模具的第二相对侧包括焊盘（14）。 接合焊盘通过导线（16）电连接到箔片上的焊料。 模具，电连接以及箔片的第一面用模具化合物（20）封装。 箔片与管芯和电线分离，形成封装的集成电路（10）。

公开(公告)号：US20050156291A1

公开(公告)日：2005-07-21

申请号：US11043547

申请日：2005-01-26

Applicant: Hei Shiu ,  Wai Chow ,  Qing-Chun He

Inventor： Hei Shiu ,  Wai Chow ,  Qing-Chun He

IPC: H01L21/56 ,  H01L23/31 ,  H01L23/495

CPC classification number: H01L24/97 ,  H01L21/566 ,  H01L23/3107 ,  H01L23/4952 ,  H01L23/49537 ,  H01L23/49548 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16245 ,  H01L2224/81001 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2224/05599

Abstract: A semiconductor device (10) includes a first leadframe (18) having a perimeter (20) that defines a cavity (22) and leads (14) extending inwardly from the perimeter, and a second leadframe (32) having top and bottom surfaces and a die paddle surrounding a die receiving area (36). An integrated circuit (12) is placed within the die receiving area of the second leadframe. The IC has bonding pads (44) located on a peripheral portion of its top surface. The second leadframe and the IC are in facing relation with the first leadframe such that the leads of the first leadframe are electrically connected to respective ones of the bonding pads. A mold compound (50) is injected between the first and second leadframes and covers the second leadframe top surface and a central area of the first surface of the IC. At least the bottom surfaces of the leads are exposed.

Abstract translation: 半导体器件（10）包括具有限定空腔（22）和从周边向内延伸的引线（14）的周边（20）的第一引线框架（18）和具有顶表面和底表面的第二引线框架（32） 围绕模具接收区域（36）的模具板。 集成电路（12）被放置在第二引线框架的管芯接收区域内。 IC具有位于其顶表面的周边部分上的接合焊盘（44）。 第二引线框和IC与第一引线框面对关系，使得第一引线框的引线电连接到相应的焊盘。 模具化合物（50）被注入到第一和第二引线框架之间并覆盖IC的第一表面的第二引线框架顶表面和中心区域。 至少引线的底面露出。

公开(公告)号：US20050146001A1

公开(公告)日：2005-07-07

申请号：US10752159

申请日：2004-01-06

Applicant: Hei Shiu ,  Wai Chow ,  Kam Lee

Inventor： Hei Shiu ,  Wai Chow ,  Kam Lee

IPC: H01L21/44 ,  H01L21/48 ,  H01L23/02 ,  H01L23/495 ,  H01L31/0203

CPC classification number: H01L31/0203 ,  H01L24/97 ,  H01L27/14618 ,  H01L27/14683 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00

Abstract: An image sensor device includes a first, QFN type leadframe to which a sensor IC is electrically connected. A second leadframe is provided for holding a lens. A third leadframe is positioned between the first and second leadframes to appropriately space the IC from the lens. Multiple sensor devices are assembled at the same time by the use of leadframe panels.

Abstract translation: 图像传感器装置包括传感器IC电连接到的第一QFN型引线框架。 提供了用于保持透镜的第二引线框架。 第三引线框架位于第一引线框架和第二引线框架之间，以便将IC与透镜适当地间隔开。 多个传感器设备通过使用引线框面板同时组装。

公开(公告)号：US20070178688A1

公开(公告)日：2007-08-02

申请号：US11341302

申请日：2006-01-27

Applicant: Hei Shiu ,  On Chau ,  Gor Lai

Inventor： Hei Shiu ,  On Chau ,  Gor Lai

IPC: H01L21/44

CPC classification number: H05K3/3484 ,  H01L21/4853 ,  H01L23/49816 ,  H01L24/11 ,  H01L24/12 ,  H01L2224/0381 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/05624 ,  H01L2224/114 ,  H01L2224/11552 ,  H01L2224/116 ,  H01L2224/11901 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/13099 ,  H01L2224/81011 ,  H01L2924/00013 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/19043 ,  H05K3/3463 ,  H05K2201/10992 ,  H05K2203/0425 ,  H05K2203/043 ,  H05K2203/0485 ,  H05K2203/1476 ,  H01L2924/00014

Abstract: A method for forming multi-layer bumps on a substrate includes depositing an adhesive or a flux on the substrate, depositing a first metal powder on the adhesive, and melting or reflowing the adhesive and first metal powder to form first bumps. An adhesive or a flux and a second metal powder are then deposited on the first bumps, and melted to form second bumps on the first bumps to form multi-layer bumps. The multi-layer bumps are formed without the need for any wet chemicals.

Abstract translation: 在基板上形成多层凸块的方法包括在基板上沉积粘合剂或助熔剂，在粘合剂上沉积第一金属粉末，熔化或回流粘合剂和第一金属粉末以形成第一凸块。 然后将粘合剂或助熔剂和第二金属粉末沉积在第一凸块上，并熔化以在第一凸块上形成第二凸块以形成多层凸块。 形成多层凸块，而不需要任何湿化学品。

公开(公告)号：US20070207605A1

公开(公告)日：2007-09-06

申请号：US11370387

申请日：2006-03-06

Applicant: Hei Shiu ,  On Chau ,  Gor Lai ,  Heng Yip ,  Thoon Chang ,  Lan Tan

Inventor： Hei Shiu ,  On Chau ,  Gor Lai ,  Heng Yip ,  Thoon Chang ,  Lan Tan

IPC: H01L21/44

CPC classification number: H05K3/4015 ,  H01L21/4853 ,  H01L23/49811 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/11312 ,  H01L2224/1134 ,  H01L2224/118 ,  H01L2224/13076 ,  H01L2224/13078 ,  H01L2224/13144 ,  H01L2224/13194 ,  H01L2224/81011 ,  H01L2224/81193 ,  H01L2924/00011 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/351 ,  H05K3/3457 ,  H05K2201/0367 ,  H05K2203/049 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2224/81805

Abstract: A method for forming reinforced interconnects or bumps on a substrate includes first forming a support structure on the substrate. A substantially filled capsule is then formed around the support structure to form an interconnect. The interconnect can reach a height of up to 300 microns.

Abstract translation: 用于在衬底上形成增强互连或凸起的方法包括首先在衬底上形成支撑结构。 然后在支撑结构周围形成基本上填充的胶囊，以形成互连。 互连可以达到高达300微米的高度。

公开(公告)号：US20070178228A1

公开(公告)日：2007-08-02

申请号：US11341281

申请日：2006-01-27

Applicant: Hei Shiu ,  On Chau ,  Ho Wong

Inventor： Hei Shiu ,  On Chau ,  Ho Wong

IPC: B05D1/12 ,  B05D5/12 ,  B01J19/08 ,  B29C71/04

CPC classification number: C23C24/10 ,  G03G13/28 ,  G03G13/283 ,  G03G13/286 ,  H05K3/1266 ,  H05K2203/0425 ,  H05K2203/043 ,  H05K2203/0517

Abstract: A method for forming a metal layer on a substrate begins by providing a resin film on the substrate. An organic photo conductor layer having charged and uncharged segments is adhered to the resin film. Metal powder is deposited onto the charged segments of the organic photo conductor layer after which it is heated to form the metal layer.

Abstract translation: 在基板上形成金属层的方法开始于在基板上设置树脂膜。 具有带电和不带电段的有机光导体层粘附到树脂膜上。 将金属粉末沉积到有机光导体层的带电段上，然后将其加热以形成金属层。

公开(公告)号：US20070099413A1

公开(公告)日：2007-05-03

申请号：US11263440

申请日：2005-10-31

Applicant: Hei Shiu ,  On Chau ,  Gor Lai

Inventor： Hei Shiu ,  On Chau ,  Gor Lai

IPC: H01L21/44

CPC classification number: H01L24/12 ,  H01L21/4853 ,  H01L23/49816 ,  H01L24/11 ,  H01L2224/0381 ,  H01L2224/05567 ,  H01L2224/05573 ,  H01L2224/05624 ,  H01L2224/114 ,  H01L2224/11552 ,  H01L2224/116 ,  H01L2224/11849 ,  H01L2224/11901 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13116 ,  H01L2224/13147 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01068 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H05K3/3484 ,  H05K3/3494 ,  H05K2201/10992 ,  H05K2203/0425 ,  H05K2203/043 ,  H05K2203/0557 ,  H05K2203/107 ,  H05K2203/1476 ,  H01L2924/00014 ,  H01L2224/13099

Abstract: A method for forming multi-layer bumps on a substrate includes depositing a first metal powder on the substrate, and selectively melting or reflowing a portion of the first metal powder to form first bumps. A second metal powder is then deposited on the first bumps, and melted to form second bumps on the first bumps. A masking plate is disposed over the substrate to select the portions of the metal powders that are melted and the metal powders are melted via an irradiation beam. The multi-layer bump is formed without the need for any wet chemicals.

公开(公告)号：US20060208363A1

公开(公告)日：2006-09-21

申请号：US11082096

申请日：2005-03-16

Applicant: Hei Shiu ,  On Chau ,  Fei Wong

Inventor： Hei Shiu ,  On Chau ,  Fei Wong

IPC: H01L23/48

CPC classification number: H01L24/97 ,  H01L23/3107 ,  H01L23/49537 ,  H01L23/49575 ,  H01L24/48 ,  H01L2224/16245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/97 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/18165 ,  H01L2924/19041 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2224/0401 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: An electronic device (60) including a first integrated circuit (IC) die (62) electrically connected to a first lead frame (64) and a second IC die (66) electrically connected to a second lead frame (68). The first lead frame (64) is electrically connected to the second lead frame (68) by at least one stud bump (72), which is selectively formed where an electrical connection between the first lead frame (64) and the second lead frame (68) is required. The first and second lead frames (64) and (68), the first and second IC dies (62) and (66), and the at least one stud bump (72) are encapsulated by a mold compound (74) to form a 3D package.

Abstract translation: 电子设备（60）包括电连接到第一引线框架（64）的第一集成电路（IC）管芯（62）和电连接到第二引线框架（68）的第二IC管芯（66）。 第一引线框架（64）通过至少一个螺柱突起（72）电连接到第二引线框架（68），该突起突起被选择性地形成在第一引线框架（64）和第二引线框架（64）之间的电连接 68）是必需的。 第一和第二引线框架（64）和（68），第一和第二IC管芯（62）和（66）以及所述至少一个螺柱凸块（72）被模具化合物（74）封装以形成 3D包装。

公开(公告)号：US20060208344A1

公开(公告)日：2006-09-21

申请号：US11081965

申请日：2005-03-16

Applicant: Hei Shiu ,  Gor Lai ,  Fei Wong

Inventor： Hei Shiu ,  Gor Lai ,  Fei Wong

IPC: H01L23/495

CPC classification number: H01L21/561 ,  H01L21/565 ,  H01L23/49565 ,  H01L24/97 ,  H01L2924/181 ,  H01L2924/00

Abstract: A lead frame panel (40) includes a body (42) having an array of die support areas (44) for receiving respective semiconductor dies. The die support areas (44) are surrounded by leads (46). Adjacent rows of leads are coupled by half-etched connection bars (48), such that each half-etched portion of the connection bars (48) forms a channel into which a mold compound (54) is injected.

Abstract translation: 引线框架面板（40）包括具有用于接收相应的半导体管芯的管芯支撑区域（44）阵列的主体（42）。 管芯支撑区域（44）被引线（46）包围。 引线的相邻行通过半蚀刻连接杆（48）连接，使得连接杆（48）的每个半蚀刻部分形成注入模具化合物（54）的通道。

公开(公告)号：US20050156301A1

公开(公告)日：2005-07-21

申请号：US11082078

申请日：2005-03-16

Applicant: Hei Shiu ,  Wai Chow ,  Kam Lee

Inventor： Hei Shiu ,  Wai Chow ,  Kam Lee

IPC: H01L21/44 ,  H01L21/48 ,  H01L23/02 ,  H01L23/495 ,  H01L31/0203

CPC classification number: H01L31/0203 ,  H01L24/97 ,  H01L27/14618 ,  H01L27/14683 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00

Abstract: An image sensor device includes a first, QFN type leadframe to which a sensor IC is electrically connected. A second leadframe is provided for holding a lens. A third leadframe is positioned between the first and second leadframes to appropriately space the IC from the lens. Multiple sensor devices are assembled at the same time by the use of leadframe panels.