公开(公告)号：US08752635B2

公开(公告)日：2014-06-17

申请号：US11638668

申请日：2006-12-13

申请人： David Wei Wang ,  Michael Hui Du ,  Gary L. Rytlewski ,  David Verzwyvelt

发明人： David Wei Wang ,  Michael Hui Du ,  Gary L. Rytlewski ,  David Verzwyvelt

IPC分类号： E21B17/02

CPC分类号： E21B17/026 ,  E21B17/1035

摘要： A technique is provided that utilizes one or both of a control line actuation mechanism and a connector protection mechanism for use in a wellbore environment. Upon landing a lower well assembly and an upper well assembly at a desired wellbore location, control line connectors are engaged. The control line actuation mechanism and/or connector protection mechanism facilitate the formation of a desirable control line connection.

摘要翻译： 提供了一种利用控制线致动机构和连接器保护机构中的一个或两个用于井眼环境中的技术。 在下井井组件和上井组件在期望的井眼位置处着陆时，控制线连接器被接合。 控制线致动机构和/或连接器保护机构有助于形成期望的控制线连接。

公开(公告)号：US20130119530A1

公开(公告)日：2013-05-16

申请号：US13588363

申请日：2012-08-17

申请人： AN HONG LIU ,  David Wei Wang ,  Shi Fen Huang ,  Yi Chang Lee ,  Hsiang Ming Huang

发明人： AN HONG LIU ,  David Wei Wang ,  Shi Fen Huang ,  Yi Chang Lee ,  Hsiang Ming Huang

IPC分类号： H01L23/34

CPC分类号： H01L23/36 ,  H01L23/373 ,  H01L23/3737 ,  H01L2924/0002 ,  H01L2924/15311 ,  H01L2924/00

摘要： A thermally enhanced packaging structure includes a chip carrier; a high power chip disposed on the chip carrier; a molding compound covering the high power chip; a heat dissipating layer disposed on the molding compound, wherein the heat dissipating layer comprises a plurality of carbon nanocapsules (CNCs); and a non-fin type heat dissipating device, disposed either on the heat dissipating layer or between the molding compound and the heat dissipating layer. The molding compound can also comprise a plurality of CNCs.

摘要翻译： 热增强包装结构包括芯片载体; 设置在芯片载体上的大功率芯片; 覆盖大功率芯片的模塑料; 设置在所述模塑料上的散热层，其中所述散热层包括多个碳纳米胶囊（CNCs）; 以及设置在散热层上或模塑料和散热层之间的非鳍式散热装置。 模塑料也可以包括多个CNCs。

公开(公告)号：US08338935B2

公开(公告)日：2012-12-25

申请号：US13116278

申请日：2011-05-26

申请人： An Hong Liu ,  David Wei Wang

发明人： An Hong Liu ,  David Wei Wang

IPC分类号： H01L23/22 ,  H01L21/00 ,  H05K7/00

CPC分类号： H05K7/205 ,  B82B1/005 ,  B82Y10/00 ,  B82Y30/00 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/525 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05022 ,  H01L2224/05569 ,  H01L2224/05572 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/29101 ,  H01L2224/2919 ,  H01L2224/29393 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/456 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/48465 ,  H01L2224/48471 ,  H01L2224/73204 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2224/8592 ,  H01L2224/92147 ,  H01L2224/92247 ,  H01L2225/0651 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01077 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K5/0213 ,  Y10S977/932 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05647 ,  H01L2224/05124 ,  H01L2224/05147

摘要： A thermally enhanced electronic package comprises a chip, a substrate, an adhesive, and an encapsulation. The adhesive or the encapsulation is mixed with carbon nanocapsules. The substrate includes an insulation layer and a wiring layer formed on the substrate. The adhesive covers the chip and the substrate. The chip is electrically connected to the wiring layer. The encapsulation covers the chip and the substrate.

摘要翻译： 热增强型电子封装包括芯片，衬底，粘合剂和封装。 将粘合剂或包封与碳纳米胶囊混合。 基板包括绝缘层和形成在基板上的布线层。 粘合剂覆盖芯片和基板。 芯片电连接到布线层。 封装覆盖芯片和基板。

公开(公告)号：US08269352B2

公开(公告)日：2012-09-18

申请号：US13004946

申请日：2011-01-12

申请人： David Wei Wang ,  An-Hong Liu ,  Hsiang-Ming Huang ,  Jar-Dar Yang ,  Yi-Chang Lee

发明人： David Wei Wang ,  An-Hong Liu ,  Hsiang-Ming Huang ,  Jar-Dar Yang ,  Yi-Chang Lee

IPC分类号： H01L23/48

CPC分类号： H01L24/48 ,  H01L23/13 ,  H01L23/3121 ,  H01L23/49816 ,  H01L23/5389 ,  H01L24/05 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/73 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/13025 ,  H01L2224/13099 ,  H01L2224/13109 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/16145 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32227 ,  H01L2224/451 ,  H01L2224/48227 ,  H01L2224/48471 ,  H01L2224/48479 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/85051 ,  H01L2224/85186 ,  H01L2224/85986 ,  H01L2224/92 ,  H01L2224/92247 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/078 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/4554 ,  H01L2224/85399 ,  H01L2224/05599

摘要： A multi-chip stack package structure comprises a substrate, which has a chip placement area defined on its upper surface and a plurality of contacts disposed outside the chip placement area; a first chip is disposed in the chip placement area with the rear surface, a plurality of first pads being disposed on the active surface and a plurality of first bumps each being formed on one of the first pads; a plurality of metal wires connect the first bumps to the contacts; a second chip with a plurality of second pads being disposed on the active surface and a plurality of second bumps each being formed on one of the second pads, the second chip being mounted to the first chip with its active surface facing the active surface of the first chip, wherein the second bumps correspondingly connect the metal wires and the first bumps respectively.

摘要翻译： 多芯片堆叠封装结构包括：衬底，其具有限定在其上表面上的芯片放置区域和布置在芯片放置区域外部的多个触点; 第一芯片设置在具有后表面的芯片布置区域中，多个第一焊盘设置在有源表面上，并且多个第一凸块各自形成在第一焊盘之一上; 多个金属线将第一凸块连接到触点; 具有多个第二焊盘的第二芯片设置在所述有源表面上，并且多个第二凸块各自形成在所述第二焊盘之一上，所述第二芯片安装到所述第一芯片，其有源表面面向所述第二焊盘的有效表面 第一芯片，其中所述第二凸块分别对应地连接所述金属线和所述第一凸块。

公开(公告)号：US20110309497A1

公开(公告)日：2011-12-22

申请号：US13004960

申请日：2011-01-12

申请人： David Wei WANG ,  An-Hong Liu ,  Hsiang-Ming Huang ,  Jar-Dar Yang ,  Yi-Chang Lee

发明人： David Wei WANG ,  An-Hong Liu ,  Hsiang-Ming Huang ,  Jar-Dar Yang ,  Yi-Chang Lee

IPC分类号： H01L23/48

CPC分类号： H01L24/48 ,  H01L23/13 ,  H01L23/3121 ,  H01L23/49816 ,  H01L23/5389 ,  H01L24/05 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/73 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/13025 ,  H01L2224/13099 ,  H01L2224/13109 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/16145 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32227 ,  H01L2224/451 ,  H01L2224/48227 ,  H01L2224/48471 ,  H01L2224/48479 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/85051 ,  H01L2224/85186 ,  H01L2224/85986 ,  H01L2224/92 ,  H01L2224/92247 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/078 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/4554 ,  H01L2224/85399 ,  H01L2224/05599

摘要： A multi-chip stack package structure comprises a substrate, which has a chip placement area defined on its upper surface and a plurality of contacts disposed outside the chip placement area; a first chip is disposed in the chip placement area with the rear surface, a plurality of first pads being disposed on the active surface and a plurality of first bumps each being formed on one of the first pads; a plurality of metal wires connect the first bumps to the contacts; a second chip with a plurality of second pads being disposed on the active surface and a plurality of second bumps each being formed on one of the second pads, the second chip being mounted to the first chip with its active surface facing the active surface of the first chip, wherein the second bumps correspondingly connect the metal wires and the first bumps respectively.

公开(公告)号：US20110304991A1

公开(公告)日：2011-12-15

申请号：US12948964

申请日：2010-11-18

申请人： TZU HSIN HUANG ,  YU TING YANG ,  HUNG HSIN LIU ,  AN HONG LIU ,  GENG SHIN SHEN ,  DAVID WEI WANG ,  SHIH FU LEE

发明人： TZU HSIN HUANG ,  YU TING YANG ,  HUNG HSIN LIU ,  AN HONG LIU ,  GENG SHIN SHEN ,  DAVID WEI WANG ,  SHIH FU LEE

IPC分类号： H05K7/20 ,  H05K1/00 ,  B82Y30/00

CPC分类号： H05K7/205 ,  B82B1/005 ,  B82Y10/00 ,  B82Y30/00 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/525 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05022 ,  H01L2224/05569 ,  H01L2224/05572 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/29101 ,  H01L2224/2919 ,  H01L2224/29393 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/456 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/48465 ,  H01L2224/48471 ,  H01L2224/73204 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2224/8592 ,  H01L2224/92147 ,  H01L2224/92247 ,  H01L2225/0651 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01077 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K5/0213 ,  Y10S977/932 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05647 ,  H01L2224/05124 ,  H01L2224/05147

摘要： A thermally enhanced electronic package comprises a driver chip, an insulator, a flexible carrier, and carbon nanocapsules. The flexible carrier includes a flexible substrate, a wiring layer formed on the substrate, and a resistant overlaying the wiring layer. The driver chip is connected to the wiring layer. The insulator is filled in the gap between the driver chip and the flexible carrier. The carbon nanocapsules are disposed on the driver chip, on the resistant, on the flexible carrier, or in the insulator to enhance heat dissipation of electronic packages.

摘要翻译： 热增强型电子封装包括驱动器芯片，绝缘体，柔性载体和碳纳米胶囊。 柔性载体包括柔性基板，形成在基板上的布线层和覆盖布线层的电阻。 驱动器芯片连接到布线层。 绝缘体填充在驱动器芯片和柔性载体之间的间隙中。 碳纳米胶囊设置在驱动芯片上，电阻上，柔性载体上或绝缘体中，以增强电子封装的散热。

公开(公告)号：US20110291268A1

公开(公告)日：2011-12-01

申请号：US12856794

申请日：2010-08-16

申请人： David Wei WANG ,  An-Hong Liu ,  Hsiang-Ming Huang ,  Yi-Chang Lee

发明人： David Wei WANG ,  An-Hong Liu ,  Hsiang-Ming Huang ,  Yi-Chang Lee

IPC分类号： H01L23/498

CPC分类号： H01L23/481 ,  H01L21/563 ,  H01L21/76898 ,  H01L24/03 ,  H01L24/04 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/92 ,  H01L24/94 ,  H01L25/0657 ,  H01L2224/0345 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/0401 ,  H01L2224/05009 ,  H01L2224/0557 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/06181 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/13022 ,  H01L2224/13025 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/13155 ,  H01L2224/1319 ,  H01L2224/1403 ,  H01L2224/14181 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/73204 ,  H01L2224/81193 ,  H01L2224/9202 ,  H01L2224/92125 ,  H01L2224/94 ,  H01L2225/06513 ,  H01L2225/06544 ,  H01L2924/0002 ,  H01L2924/01019 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/00 ,  H01L2224/05552

摘要： A semiconductor wafer structure comprises a first surface and a second surface opposite to the first surface, a plurality of chip areas formed on the first surface, a plurality of through-silicon holes formed in each of the plurality of chip areas connecting the first surface and the second surface, and a through-silicon-via (TSV) electrode structure formed in each through-silicon hole. Each through-silicon-via electrode structure comprises a dielectric layer formed on the inner wall of the through-silicon hole, a barrier layer formed on the inner wall of the dielectric layer and defining a vacancy therein, a filling metal layer filled into the vacancy, a first end of the filling metal layer being lower than the first surface forming a recess, and a soft metal cap connecting to and overlaying the first end of the filling metal layer, wherein a portion of the soft metal cap is formed in the recess and the soft metal cap protrudes out of the first surface. Hence, the reliability of multi-chip stack package structure can be enhanced with the application of these soft metal caps.

公开(公告)号：US20110168406A1

公开(公告)日：2011-07-14

申请号：US13004237

申请日：2011-01-11

申请人： Michael Hui Du ,  Gary Rytlewski ,  David Wei Wang

发明人： Michael Hui Du ,  Gary Rytlewski ,  David Wei Wang

IPC分类号： E21B19/16 ,  E21B19/18 ,  E21B19/00

CPC分类号： E21B17/023 ,  E21B19/16

摘要： A completions system utilizing a unique hydraulic coupling. The system includes an upper completion stinger configured for coupling to a lower completion tubular. Both the stinger and the tubular are outfitted with hydraulic lines therethrough. Thus, as the stinger is coupled to the tubular, hydraulic lines are also coupled. However, the termination of each line is sealingly covered by a slidable sleeve in advance of attaining the coupling between the stinger and tubular. Therefore, the lines are protected from contamination during potentially significant periods of well deployment that may occur in advance of completed coupling and system installation. Furthermore, the manner of hydraulic coupling between the stinger and tubular reduces the likelihood of damage to the hydraulic lines during the installation process.

摘要翻译： 使用独特的液压联轴器的完井系统。 该系统包括配置成与下部完成管连接的上部完井托架。 托管架和管状管都装有液压管路。 因此，当托管架连接到管状时，液压管路也联接。 然而，在获得托管架和管状物之间的联接的情况下，每条线的端接件被可滑动套管密封地覆盖。 因此，在完成的联接和系统安装之前，可以在潜在的重要的井部署期间保护管线免受污染。 此外，托管架和管道之间的液压耦合的方式降低了在安装过程中损坏液压管线的可能性。

公开(公告)号：US20100012313A1

公开(公告)日：2010-01-21

申请号：US12505340

申请日：2009-07-17

申请人： Colin Longfield ,  David Wei Wang ,  Gary L. Rytlewski

发明人： Colin Longfield ,  David Wei Wang ,  Gary L. Rytlewski

IPC分类号： E21B34/06 ,  F04B17/03 ,  F16K31/02

CPC分类号： F16K31/006 ,  E21B23/00 ,  E21B34/066 ,  F04B17/003 ,  F04B47/06

摘要： According to one or more aspects of the present disclosure, a piezoelectric pump may include a hydraulic fluid path between a low pressure source and a high pressure tool port; a fluid disposed in the hydraulic fluid path; a piston in communication with the fluid; and a piezoelectric material connected to the piston to pump the fluid through the high pressure tool port.

摘要翻译： 根据本公开的一个或多个方面，压电泵可以包括在低压源和高压工具端口之间的液压流体路径; 设置在液压流体路径中的流体; 与流体连通的活塞; 以及连接到活塞以将流体泵送通过高压工具端口的压电材料。

公开(公告)号：US20100007001A1

公开(公告)日：2010-01-14

申请号：US12501100

申请日：2009-07-10

申请人： David Wei Wang ,  An-Hong Liu ,  Hao-Yin Tsai ,  Hsiang-Ming Huang ,  Yi-Chang Lee ,  Shu-Ching Ho

发明人： David Wei Wang ,  An-Hong Liu ,  Hao-Yin Tsai ,  Hsiang-Ming Huang ,  Yi-Chang Lee ,  Shu-Ching Ho

IPC分类号： H01L23/52 ,  H01L23/538 ,  H01L21/98 ,  H01L21/768

CPC分类号： H01L23/481 ,  H01L24/48 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/05554 ,  H01L2224/16145 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/73204 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06562 ,  H01L2225/06596 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/07802 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/30107 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： Semiconductor package structures and methods for manufacturing the same are provided. The semiconductor package structure comprises a substrate unit and a first chip stack structure. The substrate unit comprises a circuit structure having test pads. The first chip stack structure comprises chips, and each of the chips has a plurality of through silicon plugs. The through silicon plugs of two adjacent chips are electrically connected and further electrically connected to the test pads of the substrate unit for electrical testing. Another semiconductor package structure provided by the present invention comprises a first semiconductor chip and a second semiconductor chip. Each of the semiconductor chips has test pads for electrical testing and a plurality of through silicon plugs connecting to the test pads. The second semiconductor chip is mounted on the first semiconductor chip, and a portion of the through silicon plugs of two semiconductor chips are electrically connected with each other.

摘要翻译： 提供半导体封装结构及其制造方法。 半导体封装结构包括衬底单元和第一芯片堆叠结构。 衬底单元包括具有测试焊盘的电路结构。 第一芯片堆叠结构包括芯片，并且每个芯片具有多个通硅插头。 两个相邻芯片的贯穿硅插头电连接并且进一步电连接到用于电测试的衬底单元的测试焊盘。 由本发明提供的另一半导体封装结构包括第一半导体芯片和第二半导体芯片。 每个半导体芯片具有用于电测试的测试焊盘和连接到测试焊盘的多个穿硅插头。 第二半导体芯片安装在第一半导体芯片上，并且两个半导体芯片的贯穿硅插头的一部分彼此电连接。