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公开(公告)号:US20240222331A1
公开(公告)日:2024-07-04
申请号:US18473126
申请日:2023-09-22
发明人: JIN-WOO PARK , UN-BYOUNG KANG , CHUNGSUN LEE
IPC分类号: H01L25/065 , H01L23/00
CPC分类号: H01L25/0657 , H01L24/03 , H01L24/05 , H01L24/09 , H01L24/16 , H01L24/32 , H01L24/73 , H01L24/81 , H01L2224/03462 , H01L2224/03464 , H01L2224/05573 , H01L2224/05644 , H01L2224/05687 , H01L2224/0569 , H01L2224/0903 , H01L2224/09152 , H01L2224/16014 , H01L2224/16148 , H01L2224/32145 , H01L2224/73204 , H01L2224/81203 , H01L2225/06513 , H01L2225/06541 , H01L2924/1431 , H01L2924/3511
摘要: A semiconductor package includes a buffer chip configured to include a first dummy region and a second dummy region and to include first pads on rear surfaces of substrates of the first and second dummy regions; and a first core chip stacked at an upper portion of the buffer to include a bump 116 coupled to the first pad and positioned on an entire surface of the substrate, wherein the first pad is positioned in a line shape having a length including at least two bumps.
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公开(公告)号:US20240170429A1
公开(公告)日:2024-05-23
申请号:US18346371
申请日:2023-07-03
发明人: Sangho Cha , Yunrae Cho
IPC分类号: H01L23/00 , H01L23/498 , H01L25/065
CPC分类号: H01L24/09 , H01L23/49822 , H01L24/05 , H01L24/08 , H01L24/16 , H01L25/0657 , H01L2224/05647 , H01L2224/05655 , H01L2224/08052 , H01L2224/0903 , H01L2224/16148 , H01L2225/06513 , H01L2924/3511
摘要: A semiconductor chip includes a semiconductor substrate that includes an upper surface and a lower surface opposite to the upper surface, a center pad disposed on a center portion of the upper surface and an edge portion disposes on an outer portion of the upper surface; a wiring structure that includes a wiring insulating layer disposed on a lower surface of the semiconductor substrate and a wiring pattern disposed in the wiring insulating layer and electrically connected to the semiconductor substrate; a first bump pad disposed on a first surface of the wiring structure and electrically connected to the wiring pattern; and a first connection bump that connects the first bump pad to an external device. The center pad has a regular octagon shape, and the edge pad has an extended octagon shape formed by extending squares from four non-continuous sides of a regular octagon.
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公开(公告)号:US20240170350A1
公开(公告)日:2024-05-23
申请号:US18150574
申请日:2023-01-05
发明人: Shih-Wei LIANG , Nien-Fang WU , Jiun-Yi WU
IPC分类号: H01L23/10 , H01L21/48 , H01L23/00 , H01L25/065
CPC分类号: H01L23/10 , H01L21/4817 , H01L24/03 , H01L24/08 , H01L24/09 , H01L24/80 , H01L24/94 , H01L25/0657 , H01L2224/03616 , H01L2224/0801 , H01L2224/08059 , H01L2224/08145 , H01L2224/0903 , H01L2224/09051 , H01L2224/09517 , H01L2224/80895 , H01L2224/80896 , H01L2224/94 , H01L2225/06524 , H01L2225/06527 , H01L2924/3512
摘要: A semiconductor device structure is provided. The semiconductor device structure includes a substrate having a device region and a seal ring region surrounding the device region. The semiconductor device structure includes a seal ring structure over the seal ring region. The seal ring structure surrounds the device region. The semiconductor device structure includes a bonding film over the seal ring structure and the substrate. The semiconductor device structure includes a bonding pad embedded in the bonding film. The bonding pad overlaps the seal ring structure along an axis perpendicular to a first top surface of the substrate, and a second top surface of the bonding pad is substantially level with a third top surface of the bonding film.
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公开(公告)号:US20240030266A1
公开(公告)日:2024-01-25
申请号:US18064134
申请日:2022-12-09
申请人: SK hynix Inc.
发明人: Pyong Su KWAG
IPC分类号: H01L27/146 , H01L25/065 , H01L23/00
CPC分类号: H01L27/14636 , H01L25/0657 , H01L27/14634 , H01L24/08 , H01L24/09 , H01L2225/06524 , H01L2225/06544 , H01L2224/0801 , H01L2224/08145 , H01L2224/0903 , H01L2224/09515 , H01L2924/1431 , H01L2224/02371 , H01L2224/02381
摘要: A stacked semiconductor device may include a first semiconductor chip including a first bonded surface and a second semiconductor chip including a second bonded surface facing the first bonded surface, the first and second bonded surfaces being bonded to each other. The first semiconductor chip includes a first substrate, at least one first power interconnect disposed between the first substrate and the first bonded surface of the first semiconductor chip and configured to carry a power-supply voltage therethrough, and at least one first power hybrid bonding structure disposed to be in contact with the first power interconnect and configured to extend along the same path as a routing path of the first power interconnect. The second semiconductor chip includes a second substrate, at least one second power interconnect disposed between the second bonded surface and the second substrate and configured to carry a power-supply voltage therethrough, and at least one second power hybrid bonding structure disposed to be in contact with the second power interconnect and the first power hybrid bonding structure and configured to extend along the same path as a routing path of the second power interconnect.
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公开(公告)号:US20240030187A1
公开(公告)日:2024-01-25
申请号:US18353167
申请日:2023-07-17
发明人: Hyunsoo Chung , Younglyong Kim
IPC分类号: H01L25/065 , H01L23/48 , H01L23/00
CPC分类号: H01L25/0657 , H01L25/0652 , H01L23/481 , H01L24/03 , H01L24/05 , H01L24/08 , H01L24/09 , H01L24/16 , H01L2225/06541 , H01L2224/05078 , H01L2224/05166 , H01L2224/05181 , H01L2224/05187 , H01L2224/08148 , H01L2224/16227 , H01L2224/16238 , H01L2224/0903 , H01L2924/2075 , H01L2924/20751 , H01L2224/03614 , H01L2224/03845
摘要: A semiconductor package includes a first semiconductor chip including a first substrate, a plurality of first pads on the first substrate, and a plurality of through-electrodes extending through the first substrate and connected to the plurality of first pads, and a second semiconductor chip on the first semiconductor chip, the second semiconductor chip including a second substrate, and a plurality of second pads below the second substrate and in contact with the plurality of first pads. The plurality of first pads includes a first group of first pads each including a first base layer including a first recess, and a first conductive pattern layer and a first insulating pattern layer alternately disposed in the first recess, and a second group of first pads each including a second base layer including a second recess, and a second conductive pattern layer disposed in the second recess.
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公开(公告)号:US20230411328A1
公开(公告)日:2023-12-21
申请号:US18060036
申请日:2022-11-30
申请人: Kioxia Corporation
发明人: Shinya ARAI , Yuta TAGUCHI
IPC分类号: H01L23/00 , H01L25/065
CPC分类号: H01L24/09 , H01L24/08 , H01L25/0657 , H01L2924/1431 , H01L2924/1438 , H01L2225/06524 , H01L2225/06527 , H01L2225/06541 , H01L2225/06593 , H01L2224/08145 , H01L2224/09515 , H01L2924/30205 , H01L2224/08055 , H01L2224/0801 , H01L2224/0903 , H01L2224/09051 , H01L2224/09179 , H01L2224/09132 , H01L2224/09133
摘要: According to an embodiment, a semiconductor device includes a first chip including a substrate, and a second chip bonded to the first chip at a first surface. Each of the first chip and the second chip includes an element region, and an end region including a chip end portion. The first chip includes a plurality of first electrodes that are arranged on the first surface in the end region and are in an electrically uncoupled state. The second chip includes a plurality of second electrodes that are arranged on the first surface in the end region, are in an electrically uncoupled state, and are respectively in contact with the first electrodes.
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公开(公告)号:US20230395536A1
公开(公告)日:2023-12-07
申请号:US18451857
申请日:2023-08-18
发明人: Naohide TOMITA , Hiroshi NISHIKAWA
IPC分类号: H01L23/66 , H01L23/498 , H01L23/538 , H01L23/522 , H01L23/48 , H01L23/00
CPC分类号: H01L23/66 , H01L23/49805 , H01L23/49838 , H01L23/5389 , H01L23/5226 , H01L23/481 , H01L24/16 , H01L24/08 , H01L24/09 , H01L2223/6677 , H01L2223/6616 , H01L2223/6655 , H01L2224/16145 , H01L2224/08112 , H01L2224/0903 , H01L2224/09177
摘要: A radio frequency module includes a mounting substrate including a first main surface and a second main surface opposite to the first main surface. A first electronic component is disposed on the first main surface of the mounting substrate. A second electronic component is disposed on the second main surface of the mounting substrate. A plurality of connection terminals are disposed on the second main surface of the mounting substrate. A wiring layer faces the second main surface of the mounting substrate. The wiring layer includes a plurality of external connection electrodes, each connected to at least one of the second electronic component and the plurality of connection terminals. At least one of the plurality of external connection electrodes overlaps the second electronic component when viewed in plan in a thickness direction of the substrate.
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公开(公告)号:US11721684B2
公开(公告)日:2023-08-08
申请号:US17245299
申请日:2021-04-30
发明人: Kohji Kanamori , Hyun Mog Park , Yong Seok Kim , Kyung Hwan Lee , Jun Hee Lim , Jee Hoon Han
CPC分类号: H01L25/18 , H01L24/05 , H01L24/08 , H01L24/09 , H10B41/27 , H10B43/27 , H01L2224/022 , H01L2224/05025 , H01L2224/08145 , H01L2224/0903 , H01L2224/09181 , H01L2924/14511
摘要: A semiconductor device includes a first semiconductor structure including circuit devices and first bonding pads; and a second semiconductor structure connected to the first semiconductor structure, the second semiconductor structure including a base layer; a first memory cell structure including first gate electrodes and first channels penetrating through the first gate electrodes; a second memory cell structure including second gate electrodes and second channels penetrating through the second gate electrodes; bit lines between the first and the second memory cell structures, and electrically connected to the first and second channels in common; first and second conductive layers on the second surface of the base layer; a pad insulating layer having an opening exposing a portion of the second conductive layer; and second bonding pads disposed to correspond to the first bonding pads in a lower portion of the second memory cell structure.
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公开(公告)号:US09941323B2
公开(公告)日:2018-04-10
申请号:US15619156
申请日:2017-06-09
申请人: Sony Corporation
发明人: Atsushi Okuyama
IPC分类号: H01L27/146 , H01L21/768 , H01L23/532 , H01L23/00 , H01L25/00
CPC分类号: H01L27/14636 , H01L21/76804 , H01L21/76831 , H01L21/76898 , H01L23/53214 , H01L23/53228 , H01L23/53238 , H01L24/06 , H01L24/09 , H01L24/94 , H01L25/50 , H01L27/14634 , H01L2224/05547 , H01L2224/05609 , H01L2224/05611 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/05655 , H01L2224/05657 , H01L2224/05666 , H01L2224/0568 , H01L2224/05681 , H01L2224/05684 , H01L2224/0903 , H01L2224/095 , H01L2224/80357 , H01L2224/80895 , H01L2224/80896 , H01L2225/06513 , H01L2924/01002 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01018 , H01L2924/01022 , H01L2924/01023 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01042 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01079 , H01L2924/01082 , H01L2924/04953 , H01L2924/00014
摘要: A semiconductor device with a connection pad in a substrate, the connection pad having an exposed surface made of a metallic material that diffuses less readily into a dielectric layer than does a metal of a wiring layer connected thereto.
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公开(公告)号:US09911778B2
公开(公告)日:2018-03-06
申请号:US15228894
申请日:2016-08-04
申请人: Sony Corporation
IPC分类号: H01L23/48 , H01L23/52 , H01L29/40 , H01L27/146 , H01L21/768 , H01L23/00 , H04N5/369 , H01L23/528 , H01L23/532 , H01L27/06
CPC分类号: H01L27/14636 , H01L21/76807 , H01L21/7684 , H01L21/76841 , H01L21/76843 , H01L23/481 , H01L23/528 , H01L23/5283 , H01L23/53223 , H01L23/53238 , H01L23/53266 , H01L23/53295 , H01L23/564 , H01L24/03 , H01L24/05 , H01L24/06 , H01L24/08 , H01L24/80 , H01L24/83 , H01L27/0688 , H01L27/14609 , H01L27/14621 , H01L27/14625 , H01L27/1464 , H01L27/14645 , H01L27/1469 , H01L2221/1031 , H01L2224/02245 , H01L2224/05027 , H01L2224/0508 , H01L2224/05124 , H01L2224/05147 , H01L2224/05166 , H01L2224/05181 , H01L2224/05546 , H01L2224/05547 , H01L2224/05571 , H01L2224/05573 , H01L2224/05578 , H01L2224/05647 , H01L2224/05686 , H01L2224/08121 , H01L2224/08145 , H01L2224/0903 , H01L2224/80011 , H01L2224/80013 , H01L2224/80091 , H01L2224/80097 , H01L2224/80203 , H01L2224/80345 , H01L2224/80357 , H01L2224/80895 , H01L2224/80896 , H01L2224/83345 , H01L2924/00014 , H01L2924/12043 , H01L2924/13091 , H04N5/369 , H01L2924/00012 , H01L2924/05442 , H01L2924/05042 , H01L2924/053 , H01L2924/049 , H01L2924/00 , H01L2224/05552
摘要: Disclosed herein is a semiconductor device, including: a first substrate including a first electrode, and a first insulating film configured from a diffusion preventing material for the first electrode and covering a periphery of the first electrode, the first electrode and the first insulating film cooperating with each other to configure a bonding face; and a second substrate bonded to and provided on the first substrate and including a second electrode joined to the first electrode, and a second insulating film configured from a diffusion preventing material for the second electrode and covering a periphery of the second electrode, the second electrode and the second insulating film cooperating with each other to configure a bonding face to the first substrate.
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