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公开(公告)号：US11581234B2
公开(公告)日：2023-02-14
申请号：US16888990
申请日：2020-06-01
发明人： Younglyong Kim , Myungkee Chung , Aenee Jang
IPC分类号： H01L23/367 , H01L25/065 , H01L23/31
摘要： A semiconductor package including a semiconductor chip, an interposer on the semiconductor chip, and a molding layer covering at least a portion of the semiconductor chip and at least a portion of the interposer may be provided. The interposer includes a interposer substrate and a heat dissipation pattern penetrating the interposer substrate and electrically insulated from the semiconductor chip. The heat dissipation pattern includes a through electrode disposed in the interposer substrate and an upper pad disposed on an upper surface of the interposer substrate and connected to the through electrode. The molding layer covers at least a portion of a sidewall of the upper pad and the upper surface of the interposer substrate. At least a portion of an upper surface of the upper pad is not covered by the molding layer.
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公开(公告)号：US20240021577A1
公开(公告)日：2024-01-18
申请号：US18121374
申请日：2023-03-14
发明人： Yanggyoo Jung , Seokgeun Ahn , Younglyong Kim
IPC分类号： H01L25/065 , H10B80/00 , H01L23/31 , H01L23/498 , H01L23/538 , H01L23/00
CPC分类号： H01L25/0655 , H10B80/00 , H01L23/3135 , H01L23/49827 , H01L23/5386 , H01L23/49816 , H01L24/08 , H01L24/13 , H01L24/16 , H01L2224/08112 , H01L2224/13147 , H01L2224/16227 , H01L2924/1431 , H01L2924/1437 , H01L2924/1436 , H01L2924/1438 , H01L2924/182
摘要： In some embodiments, a semiconductor package includes a package substrate, a plurality of semiconductor chips on the package substrate, a plurality of interposers between the package substrate and the plurality of semiconductor chips, and a molding layer in contact with the plurality of semiconductor chips and the plurality of interposers. The plurality of semiconductor chips includes a first semiconductor chip, and a second and a third semiconductor chip spaced apart from the first semiconductor chip in horizontal directions. The plurality of interposers includes a first vertical connection interposer vertically overlapping the first semiconductor chip, a second vertical connection interposer vertically overlapping the second semiconductor chip, a first horizontal connection interposer vertically overlapping the first and the second semiconductor chips, and a second horizontal connection interposer vertically overlapping the second and the third semiconductor chips.
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3.发明授权公开(公告)号：US11488937B2
公开(公告)日：2022-11-01
申请号：US17218340
申请日：2021-03-31
发明人： Hyunsoo Chung , Myungkee Chung , Younglyong Kim
IPC分类号： H01L25/065 , H01L23/538 , H01L23/31 , H01L23/12
摘要： A semiconductor package includes a package substrate, a lower package structure on the package substrate that includes a mold substrate, a semiconductor chip in the mold substrate having chip pads exposed through the mold substrate, spacer chips in the mold substrate and spaced apart from the semiconductor chip, and a redistribution wiring layer on the mold substrate that has redistribution wirings electrically connected to the chip pads, first and second stack structures on the lower package structure spaced apart from each other, each of the first and second stack structures including stacked memory chips, and a molding member covering the lower package structure and the first and second stack structures, wherein the mold substrate includes a first covering portion covering side surfaces of the semiconductor chip and the spacer chips, and a second covering portion covering a lower surface of the semiconductor chip.
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公开(公告)号：US20240079349A1
公开(公告)日：2024-03-07
申请号：US18334578
申请日：2023-06-14
发明人： Yanggyoo Jung , Younglyong Kim , Seungbin Baek
IPC分类号： H01L23/00 , H01L23/053 , H01L23/36 , H01L23/538 , H01L25/065 , H01L25/16
CPC分类号： H01L23/562 , H01L23/053 , H01L23/36 , H01L23/5385 , H01L24/32 , H01L25/0655 , H01L25/16 , H01L24/16 , H01L24/73 , H01L2224/16227 , H01L2224/32225 , H01L2224/32245 , H01L2224/73204
摘要： A semiconductor package is provided to include a package substrate, a plurality of semiconductor chips mounted on the package substrate, an interposer arranged between the package substrate and the plurality of semiconductor chips, a plurality of passive elements mounted on the package substrate and spaced apart from the interposer, a first stiffener positioned on the package substrate and including a first hole accommodating the interposer and a second hole accommodating the plurality of passive elements, and a second stiffener positioned on the first stiffener and including a third hole communicating with the first hole. The first stiffener has a first coefficient of thermal expansion, and the second stiffener has a second coefficient of thermal expansion different from the first coefficient of thermal expansion.
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公开(公告)号：US20230126686A1
公开(公告)日：2023-04-27
申请号：US17871449
申请日：2022-07-22
发明人： Inhyo Hwang , Younglyong Kim , Hyunsoo Chung
IPC分类号： H01L23/498 , H01L23/00 , H01L25/00 , H01L25/065
摘要： A semiconductor package includes a package substrate and a plurality of sub-packages provided on the package substrate. Each of the plurality of sub-packages includes a semiconductor chip, an interposer provided adjacent to the semiconductor chip, the interposer including a plurality of first through-silicon vias, an encapsulator provided between the semiconductor chip and the interposer, and a redistribution layer provided on the interposer, the encapsulator and the semiconductor chip. The semiconductor chip includes a semiconductor substrate having a first surface and a second surface opposite the first surface and a plurality of chip pads provided on the first surface. The redistribution layer includes a plurality of redistribution pads and a horizontal wiring provided between the plurality of redistribution pads and the plurality of first through-silicon vias. The redistribution layer is provided on the second surface of the semiconductor substrate, and extends on the encapsulator and the interposer.
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公开(公告)号：US11164805B2
公开(公告)日：2021-11-02
申请号：US16814455
申请日：2020-03-10
发明人： Younglyong Kim , Taewon Yoo
摘要： A semiconductor package including a package substrate, a semiconductor chip on a top surface of the package substrate, a connection terminal between the package substrate and the semiconductor chip, the connection terminal connecting the package substrate to the semiconductor chip, a non-conductive film (NCF) between the package substrate and semiconductor chip, the NCF surrounding the connection terminal and bonding the semiconductor chip to the package substrate, and a side encapsulation material covering a side surface of the semiconductor chip, contacting the package substrate, and including a first portion between a bottom surface of the semiconductor chip and the top surface of the package substrate may be provided. At least a portion of the NCF includes a second portion that horizontally protrudes from the semiconductor chip when viewed, and a portion of the side encapsulation material is in contact with the bottom surface of the semiconductor chip.
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公开(公告)号：US12033973B2
公开(公告)日：2024-07-09
申请号：US17367995
申请日：2021-07-06
发明人： Soohyun Nam , Younglyong Kim
IPC分类号： H01L23/31 , H01L23/00 , H01L23/498 , H01L25/065
CPC分类号： H01L24/73 , H01L23/49816 , H01L23/49822 , H01L23/49833 , H01L23/49838 , H01L24/16 , H01L24/32 , H01L25/0655 , H01L2224/16235 , H01L2224/32056 , H01L2224/32059 , H01L2224/32235 , H01L2224/73204 , H01L2924/1431 , H01L2924/1434 , H01L2924/1815 , H01L2924/182 , H01L2924/3512
摘要： A semiconductor package including an interposer substrate, first to third semiconductor chips on the interposer substrate to face each other, an underfill part between each of the first to third semiconductor chips and the interposer substrate, a first side-fill part extending upward from a lower end of side walls of the first to third semiconductor chips, and a second side-fill part between the side walls of the first to third semiconductor chips and extending from the first side-fill part to an upper end of the side walls of the first to third semiconductor chips may be provided.
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公开(公告)号：US20230144602A1
公开(公告)日：2023-05-11
申请号：US17977100
申请日：2022-10-31
发明人： Younglyong Kim , Hyunsoo Chung , Inhyo Hwang
IPC分类号： H01L25/065 , H01L23/00 , H01L23/31
CPC分类号： H01L25/0657 , H01L23/3128 , H01L24/29 , H01L24/32 , H01L24/48 , H01L24/45 , H01L24/73 , H01L2224/29186 , H01L2224/32145 , H01L2224/32225 , H01L2224/45139 , H01L2224/45144 , H01L2224/48145 , H01L2224/48227 , H01L2224/73265 , H01L2225/0651 , H01L2225/06506 , H01L2225/06562
摘要： The semiconductor package, includes: a package substrate; a substrate adhesive member on the package substrate; a plurality of semiconductor chips stacked on the substrate adhesive member and including first and second semiconductor chips; and a conductive connection member connecting the package substrate and the semiconductor chips, each of the semiconductor chips including a semiconductor chip body, a chip pad, an upper oxide layer comprised of a first material and covering an upper surface of the semiconductor chip body and exposing a portion of an upper surface of the chip pad, and a lower oxide layer comprised of a second material and covering a lower surface of the semiconductor chip body, wherein the upper oxide layer of the first semiconductor chip has an oxide bonding region between the first material and the second material in a first region in contact with the lower oxide layer of the second semiconductor chip.
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公开(公告)号：US11222882B2
公开(公告)日：2022-01-11
申请号：US16916779
申请日：2020-06-30
发明人： Younglyong Kim
IPC分类号： H01L25/18 , H01L23/00 , H01L23/48 , H01L23/538
摘要： Disclosed is a semiconductor package including a first semiconductor chip on a substrate, a second semiconductor chip on the substrate and laterally spaced apart from the first semiconductor chip, a dummy chip on the first semiconductor chip, and a dielectric layer between the first semiconductor chip and the dummy chip. A top surface of the first semiconductor chip may be lower than a top surface of the second semiconductor chip. The dielectric layer may include an inorganic dielectric material.
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公开(公告)号：US20240030187A1
公开(公告)日：2024-01-25
申请号：US18353167
申请日：2023-07-17
发明人： Hyunsoo Chung , Younglyong Kim
IPC分类号： H01L25/065 , H01L23/48 , H01L23/00
CPC分类号： H01L25/0657 , H01L25/0652 , H01L23/481 , H01L24/03 , H01L24/05 , H01L24/08 , H01L24/09 , H01L24/16 , H01L2225/06541 , H01L2224/05078 , H01L2224/05166 , H01L2224/05181 , H01L2224/05187 , H01L2224/08148 , H01L2224/16227 , H01L2224/16238 , H01L2224/0903 , H01L2924/2075 , H01L2924/20751 , H01L2224/03614 , H01L2224/03845
摘要： A semiconductor package includes a first semiconductor chip including a first substrate, a plurality of first pads on the first substrate, and a plurality of through-electrodes extending through the first substrate and connected to the plurality of first pads, and a second semiconductor chip on the first semiconductor chip, the second semiconductor chip including a second substrate, and a plurality of second pads below the second substrate and in contact with the plurality of first pads. The plurality of first pads includes a first group of first pads each including a first base layer including a first recess, and a first conductive pattern layer and a first insulating pattern layer alternately disposed in the first recess, and a second group of first pads each including a second base layer including a second recess, and a second conductive pattern layer disposed in the second recess.
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