公开(公告)号：US10154591B2

公开(公告)日：2018-12-11

申请号：US15896959

申请日：2018-02-14

Applicant: QUALCOMM Incorporated

Inventor： Chengjie Zuo ,  David Francis Berdy ,  Daeik Daniel Kim ,  Changhan Hobie Yun ,  Mario Francisco Velez ,  Jonghae Kim

IPC: H05K5/00 ,  H05K1/18 ,  H03H7/01 ,  H05K3/10 ,  H05K3/30 ,  H05K3/40 ,  H05K1/02 ,  H05K1/14 ,  H01L21/56 ,  H01L23/12 ,  H01L23/15 ,  H01L23/28 ,  H01L23/538 ,  H01L23/552

Abstract: Passive device assembly for accurate ground plane control is disclosed. A passive device assembly includes a device substrate conductively coupled to a ground plane separation control substrate. A passive device disposed on a lower surface of the device substrate is separated from an embedded ground plane mounted on a lower surface of the ground plane separation control substrate by a separation distance. The separation distance is accurately controlled to minimize undesirable interference that may occur to the passive device. The separation distance is provided inside the passive device assembly. Conductive mounting pads are disposed on the lower surface of the ground plane separation control substrate to support accurate alignment of the passive device assembly on a circuit board. By providing sufficient separation distance inside the passive device assembly, the passive device assembly can be precisely mounted onto any circuit board regardless of specific design and layout of the circuit board.

公开(公告)号：US20180351066A1

公开(公告)日：2018-12-06

申请号：US15611524

申请日：2017-06-01

Applicant: QUALCOMM Incorporated

Inventor： Jorge Luis Rosales ,  Victor Adrian Chiriac ,  Mario Francisco Velez ,  Peng Wang

IPC: H01L35/32 ,  H01L35/30 ,  H01L35/02 ,  H01L35/34

CPC classification number: H01L35/32

Abstract: A device that includes a region comprising a heat generating device, and an energy harvesting device coupled to the region comprising the heat generating device. The energy harvesting device includes a first thermal conductive layer, a thermoelectric generator (TEG) coupled to the first thermal conductive layer, and a second thermal conductive layer coupled the thermoelectric generator (TEG) such that the thermoelectric generator (TEG) is between the first thermal conductive layer and the second thermal conductive layer. In some implementations, the energy harvesting device includes an insulation layer.

公开(公告)号：US10141353B2

公开(公告)日：2018-11-27

申请号：US15161152

申请日：2016-05-20

Applicant: QUALCOMM Incorporated

Inventor： Changhan Hobie Yun ,  Daeik Daniel Kim ,  Jonghae Kim ,  Mario Francisco Velez ,  Chengjie Zuo ,  David Francis Berdy

IPC: H01L27/13 ,  H03H7/01 ,  H01L21/84 ,  H01L49/02 ,  H01L23/498 ,  H03H1/00

Abstract: The present disclosure provides integrated circuit apparatuses and methods for manufacturing integrated circuit apparatuses. An integrated circuit apparatus may include a first insulator, the first insulator being substantially planar and having a first top surface and a first bottom surface opposite the first top surface, a first conductor disposed on the first insulator, a second insulator, the second insulator being substantially planar and having a second top surface and a second bottom surface opposite the second top surface, a second conductor disposed on the second insulator, and a dielectric layer disposed between the first bottom conductor of the first insulator and the second top conductor of the second insulator.

公开(公告)号：US10103703B2

公开(公告)日：2018-10-16

申请号：US15161138

申请日：2016-05-20

Applicant: QUALCOMM Incorporated

Inventor： Changhan Hobie Yun ,  David Francis Berdy ,  Chengjie Zuo ,  Daeik Daniel Kim ,  Jonghae Kim ,  Mario Francisco Velez ,  Niranjan Sunil Mudakatte ,  Robert Paul Mikulka

IPC: H03H7/01 ,  H01F5/00 ,  H01F41/04 ,  H01P1/203 ,  H03H7/09 ,  H05K1/18 ,  H03H1/00 ,  H05K1/02 ,  H05K1/03 ,  H05K1/11 ,  H05K1/16 ,  H05K3/00 ,  H05K3/18 ,  H05K3/40 ,  H01P1/213 ,  H01P5/12 ,  H03H7/46

Abstract: The present disclosure provides circuits and methods for fabricating circuits. A circuit may include an insulator having a first surface, a second surface, a periphery, a first subset of circuit elements disposed on the first surface, a second subset of circuit elements disposed on the second surface, and at least one conductive sidewall disposed on the periphery, wherein the conductive sidewall electrically couples the first subset of circuit elements to the second subset of circuit elements.

公开(公告)号：US20180145062A1

公开(公告)日：2018-05-24

申请号：US15861140

申请日：2018-01-03

Applicant: QUALCOMM Incorporated

Inventor： Je-Hsiung Jeffrey Lan ,  Niranjan Sunil Mudakatte ,  Changhan Hobie Yun ,  Daeik Daniel Kim ,  Chengjie Zuo ,  David Francis Berdy ,  Mario Francisco Velez ,  Jonghae Kim

IPC: H01L27/01 ,  H01L49/02 ,  H01L23/522 ,  H01L23/15

CPC classification number: H01L27/01 ,  H01G2/02 ,  H01G4/005 ,  H01L21/4846 ,  H01L23/15 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/5223 ,  H01L23/5227 ,  H01L28/10 ,  H01L28/75 ,  H01L2224/11

Abstract: A device includes a glass substrate and a capacitor. The capacitor includes a first metal coupled to a first electrode, a dielectric structure, and a via structure comprising a second electrode of the capacitor. The first metal structure is separated from the via structure by the dielectric structure.

公开(公告)号：US09966426B2

公开(公告)日：2018-05-08

申请号：US14853967

申请日：2015-09-14

Applicant: QUALCOMM Incorporated

Inventor： Niranjan Sunil Mudakatte ,  Daeik Daniel Kim ,  David Francis Berdy ,  Changhan Hobie Yun ,  Je-Hsiung Jeffrey Lan ,  Chengjie Zuo ,  Mario Francisco Velez ,  Robert Paul Mikulka ,  Jonghae Kim

IPC: H01L23/057 ,  H01L23/48 ,  H01L23/495 ,  H01L49/02 ,  H01L23/522 ,  H01L27/08 ,  H01L23/00

CPC classification number: H01L28/60 ,  H01L23/5223 ,  H01L24/13 ,  H01L27/0805 ,  H01L28/87 ,  H01L28/91 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/13109 ,  H01L2224/94 ,  H01L2924/10329 ,  H01L2924/1033 ,  H01L2924/10337 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/14 ,  H01L2224/03

Abstract: An augmented capacitor structure includes a substrate and a first capacitor plate of a first conductive layer on the substrate. The augmented capacitor structure also includes an insulator layer on a surface of the first capacitor plate facing away from the substrate and a second capacitor plate. The second capacitor plate includes a second conductive layer on the insulator layer, supported by the first capacitor plate as a first capacitor. A second capacitor electrically is coupled in series with the first capacitor. The first capacitor plate is shared by the first capacitor and the second capacitor as a shared first capacitor plate. An extended first capacitor plate includes a first dummy portion of a third conductive layer and a first dummy via bar extending along the surface of the shared first capacitor plate. The first dummy portion extends along and is supported by the first dummy via bar.

公开(公告)号：US09935166B2

公开(公告)日：2018-04-03

申请号：US13833632

申请日：2013-03-15

Applicant: QUALCOMM Incorporated

Inventor： Je-Hsiung Lan ,  Chengjie Zuo ,  Changhan Yun ,  David F. Berdy ,  Daeik D. Kim ,  Robert P. Mikulka ,  Mario Francisco Velez ,  Jonghae Kim

IPC: H05K1/16 ,  H01L49/02 ,  G06F17/50 ,  H01L23/498 ,  H01L27/01 ,  H01L23/15 ,  H01L27/12

CPC classification number: H01L28/40 ,  G06F17/5068 ,  H01L23/15 ,  H01L23/481 ,  H01L23/49822 ,  H01L23/49827 ,  H01L27/016 ,  H01L27/12 ,  H01L28/10 ,  H01L28/60 ,  H01L2924/0002 ,  H01L2924/00

Abstract: In a particular embodiment, a device includes a substrate, a via that extends at least partially through the substrate, and a capacitor. A dielectric of the capacitor is located between the via and a plate of the capacitor, and the plate of the capacitor is external to the substrate and within the device.

公开(公告)号：US09906318B2

公开(公告)日：2018-02-27

申请号：US14682023

申请日：2015-04-08

Applicant: QUALCOMM Incorporated

Inventor： Chengjie Zuo ,  Daeik Daniel Kim ,  David Francis Berdy ,  Changhan Hobie Yun ,  Je-Hsiung Jeffrey Lan ,  Robert Paul Mikulka ,  Mario Francisco Velez ,  Jonghae Kim ,  Matthew Michael Nowak ,  Ryan Scott C. Spring ,  Xiangdong Zhang

IPC: H04J1/00 ,  H04J1/08 ,  H03H7/46 ,  H04B1/00

CPC classification number: H04J1/08 ,  H03H7/465 ,  H03H2240/00 ,  H03H2250/00 ,  H04B1/0057 ,  H04B1/006 ,  H04B1/0064

Abstract: An apparatus is disclosed that includes a frequency multiplexer circuit coupled to an input node and configured to receive an input signal via the input node. The frequency multiplexer circuit comprises a first filter circuit, a second filter circuit, and a third filter circuit. The apparatus also includes a switching circuit that is configurable to couple at least two of a first output of the first filter circuit, a second output of the second filter circuit, or a third output of the third filter circuit to a single output port.

公开(公告)号：US20170364726A1

公开(公告)日：2017-12-21

申请号：US15430389

申请日：2017-02-10

Applicant: QUALCOMM Incorporated

Inventor： Nicholas Ian Buchan ,  Mario Francisco Velez ,  Chin-Jen Tseng ,  Hrishikesh Vijaykumar Panchawagh ,  Firas Sammoura ,  Jessica Liu Strohmann ,  Kostadin Dimitrov Djordjev ,  David Williams Burns ,  Leonard Eugene Fennell ,  Jon Gregory Aday

IPC: G06K9/00 ,  H01L41/107 ,  H01L41/047 ,  G02F1/1333 ,  H01L27/32

CPC classification number: G06K9/0002 ,  G01N29/22 ,  G01N29/2437 ,  G02F1/13338 ,  H01L27/323 ,  H01L41/047 ,  H01L41/107

Abstract: A fingerprint sensor device includes a sensor substrate, a plurality of sensor circuits over a first surface of the sensor substrate, and a transceiver layer located over the plurality of sensor circuits and the first surface of the sensor substrate. The transceiver layer includes a piezoelectric layer and a transceiver electrode positioned over the piezoelectric layer. The piezoelectric layer and the transceiver electrode are configured to generate one or more ultrasonic waves or to receive one or more ultrasonic waves. The fingerprint sensor device may include a cap coupled to the sensor substrate and a cavity formed between the cap and the sensor substrate. The cavity and the sensor substrate may form an acoustic barrier.

公开(公告)号：US20170331445A1

公开(公告)日：2017-11-16

申请号：US15151351

申请日：2016-05-10

Applicant: QUALCOMM Incorporated

Inventor： Yunfei Ma ,  Chengjie Zuo ,  David Francis Berdy ,  Daeik Daniel Kim ,  Changhan Hobie Yun ,  Je-Hsiung Jeffrey Lan ,  Mario Francisco Velez ,  Niranjan Sunil Mudakatte ,  Robert Paul Mikulka ,  Jonghae Kim

IPC: H03H7/38 ,  H03H7/40

CPC classification number: H03H7/38 ,  H03H7/40 ,  H04B1/0458

Abstract: A tunable matching network is disclosed. In a particular example, the matching network includes at least one first inductor in a signal path of the matching network. The matching network includes at least one second inductor outside of the signal path. The matching network includes one or more switches coupled to the at least one second inductor. The one or more switches are configured to selectively enable mutual coupling of the at least one first inductor and the at least one second inductor.