公开(公告)号：US20220344480A1

公开(公告)日：2022-10-27

申请号：US17755380

申请日：2021-05-19

Applicant: BOE Technology Group Co., Ltd.

Inventor： Lizhong Wang ,  Ce Ning ,  Hehe Hu ,  Tianmin Zhou ,  Jipeng Song

IPC: H01L29/417 ,  H01L29/786

Abstract: The present disclosure provides a thin film transistor, a GOA circuit and an array substrate, the thin film transistor including a source electrode, including a source electrode wiring and a plurality of source electrode branches; a drain electrode, including a drain electrode wiring and a plurality of drain electrode branches; a gate; a semiconductor layer including a plurality of semiconductor branches; a plurality of source electrode branches. The plurality of drain electrode branches are in contact with the plurality of semiconductor branches and are divided into a plurality of cells; the source electrode wiring and the drain electrode wiring are arranged in a parallel and spaced apart, and the number m of one of the source electrode wiring and the drain electrode wiring is an integer greater than or equal to 2, and the number n of the other is an integer greater than or equal to 1.

公开(公告)号：US11219899B2

公开(公告)日：2022-01-11

申请号：US16475035

申请日：2018-08-01

Applicant: BOE Technology Group Co., Ltd.

Inventor： Xiaochen Ma ,  Guangcai Yuan ,  Ce Ning ,  Song Liu

IPC: B60L3/00 ,  G01N27/414 ,  B01L3/00

Abstract: The present application provides a micro-channel structure. The micro-channel structure includes a base substrate; a rail layer on the base substrate and including a first rail and a second rail spaced apart from each other; and a wall layer on a side of the rail layer distal to the base substrate, and including a first wall and a second wall at least partially spaced apart from each other, thereby forming a micro-channel between the first wall and the second wall. The micro-channel has an extension direction along a plane substantially parallel to a main surface of the base substrate, the extension direction being substantially parallel to extension directions of the first rail and the second rail along the plane substantially parallel to the main surface of the base substrate.

公开(公告)号：US10889504B2

公开(公告)日：2021-01-12

申请号：US16344000

申请日：2018-09-17

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Wenlin Zhang ,  Ce Ning ,  Hehe Hu ,  Zhengliang Li

IPC: C01G15/00 ,  H01L29/786

Abstract: An oxide semiconductor composition for use in thin film transistors includes indium oxide, zinc oxide, and an oxide including a doping element of scandium, such as scandium oxide. A molar percentage of the indium oxide can be larger than approximately 50%. The oxide semiconductor composition can have a formula of In2Sc2ZnO7. Manufacturing of the oxide semiconductor composition can include: mixing indium oxide powder, scandium oxide powder, and zinc oxide powder to thereby obtain an oxide shaped object; and sintering the oxide shaped object to form the oxide semiconductor composition. A thin-film transistor for use in a semiconductor device, such as a display apparatus, can include the oxide semiconductor composition, and can thereby have improved mobility of the oxide semiconductor due to the reduced oxygen vacancy therein.

公开(公告)号：US20200185535A1

公开(公告)日：2020-06-11

申请号：US16528622

申请日：2019-08-01

Applicant: BOE Technology Group Co., Ltd.

Inventor： Feng Guan ,  Guangcai Yuan ,  Zhi Wang ,  Chen Xu ,  Qi Yao ,  Zhanfeng Cao ,  Ce Ning ,  Woobong Lee ,  Lei Chen

IPC: H01L29/786 ,  H01L27/12

Abstract: An oxide thin film transistor, an array substrate, and preparation methods thereof are disclosed. The method for preparing an oxide thin film transistor comprises a step of forming a pattern comprising an oxide semiconductor active layer on a substrate, wherein the step comprises: forming an amorphous oxide semiconductor thin film on the substrate; performing an excimer laser annealing, at least at a position in the amorphous oxide semiconductor thin film corresponding to a channel region of oxide semiconductor active layer to be formed, such that the amorphous oxide semiconductor material at the laser-annealed position is crystallized, to form a crystalline oxide semiconductor material; and forming the pattern comprising the oxide semiconductor active layer.

公开(公告)号：US10431694B2

公开(公告)日：2019-10-01

申请号：US16165316

申请日：2018-10-19

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Ce Ning ,  Wei Yang

IPC: H01L21/425 ,  H01L29/786 ,  G02F1/1362 ,  H01L21/02 ,  H01L21/027 ,  H01L21/4763 ,  H01L27/12 ,  H01L29/24 ,  H01L29/45 ,  H01L29/66 ,  G02F1/1368

Abstract: The present application discloses a thin film transistor including a base substrate; an active layer on the base substrate having a channel region, a source electrode contact region, and a drain electrode contact region; an etch stop layer on a side of the channel region distal to the base substrate covering the channel region; a source electrode on a side of the source electrode contact region distal to the base substrate; and a drain electrode on a side of the drain electrode contact region distal to the base substrate. A thickness of the active layer in the source electrode contact region and the drain electrode contact region is substantially the same as a combined thickness of the active layer in the channel region and the etch stop layer.

公开(公告)号：US10242886B2

公开(公告)日：2019-03-26

申请号：US15569728

申请日：2017-04-12

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Ce Ning ,  Wei Yang

IPC: H01L21/477 ,  H01L21/77 ,  H01L27/12 ,  H01L29/66 ,  H01L29/786

Abstract: A method for fabricating an array substrate is disclosed. The method comprises: forming a first oxide semiconductor active layer of a first TFT in a GOA area of a substrate; performing a first annealing process on the first oxide semiconductor active layer at a first temperature; forming a first insulating layer which covers the first oxide semiconductor active layer; performing a second annealing process on the first oxide semiconductor active layer at a second temperature, wherein the second temperature is lower than the first temperature. This improves a forward bias stability of the first TFT and increases the device lifetime.

公开(公告)号：US10192996B2

公开(公告)日：2019-01-29

申请号：US15744954

申请日：2017-03-06

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Ce Ning ,  Wei Yang

IPC: H01L29/78 ,  H01L29/786 ,  G02F1/1362 ,  H01L21/02 ,  H01L21/027 ,  H01L21/425 ,  H01L21/4763 ,  H01L27/12 ,  H01L29/24 ,  H01L29/45 ,  H01L29/66 ,  G02F1/1368

Abstract: The present application discloses a thin film transistor including a base substrate; an active layer on the base substrate having a channel region, a source electrode contact region, and a drain electrode contact region; an etch stop layer on a side of the channel region distal to the base substrate covering the channel region; a source electrode on a side of the source electrode contact region distal to the base substrate; and a drain electrode on a side of the drain electrode contact region distal to the base substrate. A thickness of the active layer in the source electrode contact region and the drain electrode contact region is substantially the same as a combined thickness of the active layer in the channel region and the etch stop layer.

公开(公告)号：US20170133402A1

公开(公告)日：2017-05-11

申请号：US14768000

申请日：2015-01-05

Applicant: Boe Technology Group Co., Ltd.

Inventor： Ce Ning ,  Chunwei Wu ,  Yuting Zhang

IPC: H01L27/12

CPC classification number: H01L27/124 ,  G02F1/133345 ,  G02F1/134309 ,  G02F1/134363 ,  G02F1/136 ,  G02F2001/134318 ,  G02F2001/134372 ,  G02F2001/134381 ,  G02F2001/13606 ,  G02F2201/121 ,  H01L27/1248

Abstract: One embodiment of the present disclosure provides an array substrate, comprising: a gate line, a data line, and a common electrode layer electrically insulated from the gate line and the data line, wherein there is at least one overlapping area between the common electrode layer and the gate line, and/or, there is at least one overlapping area between the common electrode layer and the data line; moreover, the common electrode layer comprises a hollow structure part located in the at least one overlapping area, and the hollow structure part located in the overlapping area comprises at least one hollow area.

公开(公告)号：US20160357044A1

公开(公告)日：2016-12-08

申请号：US14891729

申请日：2015-05-22

Applicant: BOE Technology Group Co., Ltd.

Inventor： Zhijun Lv ,  Tailiang Li ,  Tao Gao ,  Ce Ning ,  Shuang Sun

IPC: G02F1/1368 ,  G02F1/1343 ,  H01L29/417 ,  H01L29/45 ,  H01L29/423 ,  G02F1/1335 ,  H01L29/49

CPC classification number: G02F1/1368 ,  G02F1/133345 ,  G02F1/133553 ,  G02F1/13439 ,  G02F1/1362 ,  G02F1/136227 ,  G02F2201/123 ,  G02F2203/02 ,  H01L27/124 ,  H01L27/1248 ,  H01L29/41733 ,  H01L29/42384 ,  H01L29/458 ,  H01L29/4908

Abstract: The present disclosure discloses an array substrate, comprising a substrate, a plurality of pixel regions on the substrate, and a thin-film transistor formed in each of the pixel regions, each of the pixel regions comprising a pixel electrode region, wherein, the thin-film transistor comprises a gate layer and a source/drain layer formed laminatedly on the substrate; the array substrate further comprises a flat layer and a reflective metal layer formed in sequence on the substrate and covering at least the pixel electrode region and the thin-film transistor; the reflective metal layer is electrically connected to a drain of the thin-film transistor; and at least one of the gate layer and the source/drain layer is formed of a single metal layer. The present disclosure further provides a method for manufacturing the array substrate and a totally reflective type liquid crystal display comprising the array substrate.

Abstract translation: 本公开公开了一种阵列基板，包括基板，基板上的多个像素区域和形成在每个像素区域中的薄膜晶体管，每个像素区域包括像素电极区域，其中，薄的 薄膜晶体管包括层叠在基板上的栅极层和源极/漏极层; 阵列基板还包括依次形成在基板上并覆盖至少像素电极区域和薄膜晶体管的平坦层和反射金属层; 反射金属层电连接到薄膜晶体管的漏极; 并且栅极层和源极/漏极层中的至少一个由单个金属层形成。 本公开还提供了一种用于制造阵列基板的方法和包括阵列基板的全反射型液晶显示器。

公开(公告)号：US09373649B2

公开(公告)日：2016-06-21

申请号：US14422342

申请日：2014-06-30

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Ce Ning ,  Wei Yang ,  Ke Wang

IPC: H01L29/10 ,  H01L27/12 ,  G02F1/1343

CPC classification number: H01L27/1248 ,  G02F2001/134372 ,  H01L27/1259 ,  H01L27/1288

Abstract: The invention belongs to the field of display technology, and particularly provides an array substrate and a method for manufacturing the same, and a display device. The array substrate includes a base substrate, and a thin film transistor and driving electrodes provided on the base substrate, the thin film transistor includes a gate, a gate insulating layer, an active layer, a source and a drain, the driving electrodes include a slit-shaped electrode and a plate-shaped electrode which are located in different layers and at least partially overlap with each other in the orthographic projection direction, the source, the drain and the active layer are formed so that part of their bottom surfaces are located in the same plane, and a resin layer is further provided between the thin film transistor and the plate-shaped electrode.

Abstract translation: 本发明属于显示技术领域，特别是提供阵列基板及其制造方法以及显示装置。 阵列基板包括基底基板和设置在基底基板上的薄膜晶体管和驱动电极，薄膜晶体管包括栅极，栅极绝缘层，有源层，源极和漏极，驱动电极包括 狭缝状电极和板状电极，其位于不同的层中并且在正投影方向上彼此至少部分重叠，源极，漏极和有源层形成为使得它们的底表面的一部分位于 在同一平面内，在薄膜晶体管和板状电极之间进一步设置树脂层。