-
公开(公告)号：US20170236465A1
公开(公告)日：2017-08-17
申请号：US14905789
申请日：2015-09-09
Applicant: Shenzhen China Star Optoelectronics Technology Co., Ltd. , Wuhan China Star Optoelectronics Technology Co., Ltd.
Inventor： Gonghua ZOU , Chang CAO , Chunpeng GUO
IPC: G09G3/20
CPC classification number: G09G3/2074 , G09G3/2003 , G09G3/2092 , G09G3/3685 , G09G2300/0452 , G09G2310/0297
Abstract: The present invention discloses a driving circuit according to RGBW and a flat panel display. In the driving circuit: control terminals of a first and second voltage-level switches and a first non-voltage-level switch are connected to a first driving line, input terminals are connected to a driving signal source, output terminals are respectively connected to input terminals of a third non-voltage-level switch, a third and fourth voltage-level switches, control terminals of the third non-voltage-level switch and the third and fourth voltage-level switches are connected to a second driving line, output terminals of the third non-voltage-level switch and the third and fourth voltage-level switches are connected to a first to third sub-pixels. The circuit can implement that a size occupied by the driving lines is decreased and the aperture ratio of the display is increased.
-
公开(公告)号：US20170235171A1
公开(公告)日：2017-08-17
申请号：US14907556
申请日：2015-12-31
Inventor： Yue MA
IPC: G02F1/1368 , G02F1/1362 , G02F1/1333 , G02F1/1335
CPC classification number: G02F1/1368 , G02F1/133345 , G02F1/133514 , G02F1/136286 , G02F2001/133357 , G02F2201/07 , G02F2201/121 , G02F2201/123 , G02F2202/10 , H01L27/124 , H01L27/1248
Abstract: The present invention provides an array substrate, and the array substrate includes a substrate, a buffer layer, a semiconductor layer, a gate isolation layer, a gate metal layer, a source drain metal layer, a flat layer, an interlayer insulation layer, a common electrode layer, a passivation layer and a pixel electrode layer, which are sequentially formed on the substrate, wherein the array substrate further comprises a common signal adjustment structure formed at the common electrode layer, and the common signal adjustment structure and the common electrode layer are together employed to be a common electrode for transmitting a common signal to reduce a resistance in a common signal transmission process. The present invention further provides the aforesaid array substrate and a manufacture method thereof, a display device.
-
公开(公告)号：US20170227188A1
公开(公告)日：2017-08-10
申请号：US14905516
申请日：2015-12-31
Inventor： Jie ZENG
CPC classification number: F21V3/02 , F21V3/00 , F21V3/049 , F21Y2107/10 , G02B6/0001 , G02B6/0021 , G02B6/0068 , G02B6/0078
Abstract: The present invention provides a display device having a direct-lit type light guide plate with a curved surface, including a light guide plate with a curved surface. The curved surface of the light guide plate with a curved surface is formed by a plurality of strip-shaped sections connected in parallel with each other. A strip-shaped groove parallel and connected to the strip-shaped sections is formed between each two of the strip-shaped sections. In addition, a plurality of direct-type light sources are included, the direct-type light sources arranged in more than one row, and each row of the direct type lights corresponds to each of the strip-shaped grooves.
-
公开(公告)号：US20170222061A1
公开(公告)日：2017-08-03
申请号：US14778607
申请日：2015-06-24
Inventor： Wenshuai Guo , Xing Ming , Zhiyuan Shen
IPC: H01L29/786 , H01L29/423 , H01L29/66 , H01L27/12
CPC classification number: H01L29/78675 , H01L27/12 , H01L27/1222 , H01L27/1288 , H01L29/42384 , H01L29/6675 , H01L29/66757 , H01L29/786 , H01L29/78606 , H01L29/78645 , H01L29/78696
Abstract: The present invention provides a manufacture method of a TFT substrate structure and a TFT substrate structure. In the manufacture method of the TFT substrate structure, as manufacturing the gate, a plurality of metal sections distributed in spaces are formed at two sides of the gate, and the gate and the plurality of metal sections are employed to be a mask to implement ion implantation to the polysilicon layer. In the TFT substrate structure according to the present invention, the undoped areas are formed among the n-type heavy doping areas while forming the n-type heavy doping areas at the polysilicon layer.
-
675.发明申请公开(公告)号：US20170221929A1
公开(公告)日：2017-08-03
申请号：US15138183
申请日：2016-04-25
Inventor： Xiaojiang Yu
IPC: H01L27/12 , H01L21/027 , H01L21/3213 , H01L21/266 , H01L29/49 , H01L29/786 , H01L21/02 , H01L29/167 , H01L29/45 , H01L29/66 , H01L21/265
CPC classification number: H01L27/1222 , H01L21/02532 , H01L21/02592 , H01L21/02667 , H01L21/0274 , H01L21/26513 , H01L21/26586 , H01L21/266 , H01L21/32139 , H01L27/1218 , H01L27/1259 , H01L29/167 , H01L29/458 , H01L29/4908 , H01L29/495 , H01L29/66757 , H01L29/78621 , H01L29/78624 , H01L29/78633 , H01L29/78675
Abstract: The present invention provides a manufacture method of a Low Temperature Poly-silicon TFT substrate and a Low Temperature Poly-silicon TFT substrate. In the manufacture method of the Low Temperature Poly-silicon TFT substrate according to the present invention, by employing the tilted ion beam to implement high dose ion implantation to the polysilicon layer to form the heavy doped area, and then employing the perpendicular ion beam to implement low dose ion implantation to the polysilicon layer to form the light doped area, the thin film transistor having the single side LDD area can be easily manufactured, and thus to diminish the hot carrier effect and electrical leakage of the thin film transistor for simplifying the manufacture process and lowering the manufacture cost.
-
Patent Agency Ranking
公开(公告)号：US09721520B2
公开(公告)日：2017-08-01
申请号：US14786088
申请日：2015-09-23
Applicant: Shenzhen China Star Optoelectronics Technology Co., Ltd. , Wuhan China Star Optoelectronics Technology Co., Ltd.
Inventor： Shangcao Cao
IPC: G09G3/36
CPC classification number: G09G3/3677 , G09G3/3696 , G09G2300/0408 , G09G2300/0426 , G09G2300/0809 , G09G2310/0213 , G09G2310/0289 , G09G2310/08
Abstract: The application disclosure a GOA circuit and a liquid crystal display. The GOA circuit including a plurality of GOA unit connected in series, wherein a Nth level GOA unit including a fifth transistor, a eighth transistor and a leakage control module. wherein the leakage control module is connected in series between the Nth level gate terminal signal and the drain terminal of the eighth transistor and/or between the Nth level pull-down signal and the drain terminal of the fifth transistor; in the valid period of the Nth level scanning signal can block the Nth level gate terminal signal through the leakage pathway of the eighth transistor and/or to block the Nth level pull-down signal through the leakage pathway of the fifth transistor to achieve the stability of the GOA circuit.
-
公开(公告)号：US20170212396A1
公开(公告)日：2017-07-27
申请号：US15075151
申请日：2016-04-05
Inventor： Shangcao CAO
IPC: G02F1/1362 , G02F1/1368 , G02F1/1343 , G02F1/1333 , G02F1/1335
CPC classification number: G02F1/136213 , G02F1/133345 , G02F1/133514 , G02F1/134309 , G02F1/134363 , G02F1/136286 , G02F1/1368 , G02F2001/133397 , G02F2201/121 , G02F2201/123 , G02F2202/104
Abstract: An array substrate, a liquid crystal display panel and a liquid crystal display device of the present disclosure provided are designed to form a MIS storage capacitor by the polycrystalline semiconductor layer, the first metal layer and the insulating layer between the two or the polycrystalline semiconductor layer, the second metal layer and the insulating layer between the two. When one side of the first metal layer or the second metal layer is receiving the negative gray scale voltage, a P—Si in the polycrystalline semiconductor layer will gather to form a cavity, when receiving the positive gray scale voltage, a blocking layer will be formed on the P—Si to reduce the capacity of the MIS storage capacitor.
-
公开(公告)号：US20170212298A1
公开(公告)日：2017-07-27
申请号：US15173413
申请日：2016-06-03
Inventor： Qian CHEN , Zhongjie LIU
IPC: F21V8/00
CPC classification number: G02B6/0088 , G02B6/0051 , G02B6/0053 , G02B6/0093 , G02F1/133308 , G02F1/133514 , G02F1/133528 , G02F1/1368 , G02F2001/133317 , G02F2201/503
Abstract: A plastic frame is configured for fixing a backlight module generating a light source and for transmitting the light source to a panel. The plastic frame includes end surfaces for adhering adhesive-shading tape. The end surface is configured with an elastic protrusive portion. With such configuration, when the liquid crystal panel is pressed, the elastic protrusive portion operates as a buffer to absorb the shocks. In this way, the top and the down prism sheets, a diffuser sheet, or a light guiding plate are prevented from being crushed or scraped. In addition, a backlight module and a display device are also disclosed.
-
公开(公告)号：US20170199423A1
公开(公告)日：2017-07-13
申请号：US14901031
申请日：2015-12-18
Inventor： Yan CHENG
IPC: G02F1/1335 , F21V8/00 , G02F1/1368
CPC classification number: G02F1/133553 , G02B6/0023 , G02B6/0026 , G02B6/005 , G02B6/0056 , G02F1/133514 , G02F1/133621 , G02F1/1368 , G02F2001/133565 , G02F2001/133614 , G02F2001/133616 , G02F2202/36
Abstract: A LCD and the display method thereof are disclosed. The LCD includes a light guiding plate, a light source, a QD media layer, a first polarizer, and an advanced polarization conversion film (APCF). The QD media layer is arranged between the light source and the first polarizer, the first polarizer and the APCF are arranged between the QD media layer and the light guiding plate. The light beams emitted from the light source pass through the QD media layer and activate the QD media layer to emit lights In this way, the brightness of the reflective LCD may be enhanced.
-
公开(公告)号：US20170199407A1
公开(公告)日：2017-07-13
申请号：US14901250
申请日：2015-11-27
Applicant: Shenzhen China Star Optoelectronics Technology Co. Ltd. , Wuhan China Star Optoelectronics Technology Co., Ltd.
Inventor： Zuyou YANG
IPC: G02F1/1333 , G02F1/1368 , G02F1/1343 , G02F1/1362
CPC classification number: G02F1/13338 , G02F1/133345 , G02F1/13439 , G02F1/136209 , G02F1/136227 , G02F1/1368 , G02F2001/133357 , G02F2001/134318 , G02F2001/134381 , G02F2001/136231 , G02F2001/13685 , G02F2201/121 , G02F2202/104 , G06F3/0412 , H01L27/12 , H01L27/1248 , H01L29/78633 , H01L29/78675
Abstract: An array substrate is provided. The array substrate includes: a substrate; a LTPS TFT disposed above the substrate; a planarization layer covering the LTPS TFT; a via hole formed in the planarization layer, wherein the via hole reveals a drain electrode of the LTPS TFT; multiple common electrodes and receiving electrodes disposed separately on the planarization layer, wherein the multiple common electrode function as a driving electrode in a touch stage, and the multiple common electrodes which are disposed separately are connected with each other; a passivation layer which covers the multiple common electrodes and the multiple receiving electrodes and the planarization layer; and a pixel electrode disposed on the passivation layer, wherein, the pixel electrode is contacted with the drain electrode through the via hole. A manufacturing method for the array substrate is also provided. The present invention can reduce one manufacturing process and decrease production cost.
-
-
-
-
-
-
-
-
-
Search Results
3634
records
(took 0.039 seconds)
