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公开(公告)号:US10088723B2
公开(公告)日:2018-10-02
申请号:US14783927
申请日:2015-07-09
Inventor: Xing Ming , Zhiyuan Shen
IPC: G02F1/1343 , G02F1/1362 , H01L27/12 , G02F1/1333 , G06F3/044 , G06F3/041 , G02F1/1368 , H01L29/786
Abstract: The present invention provides a pixel structure, comprising scan lines, data lines and pixel areas, and the scan lines are separately arranged in parallel along a horizontal direction, and the data lines are separately arranged in parallel along a vertical direction, and the scan lines and the data lines overlap with each other to form the pixel areas, and the pixel structure further comprises a connection electrode employed to coupled to pixel areas, and the connection electrode comprises a first connection layer and a second connection layer, and the first connection layer is in the same pattern layer with the scan lines and intersects with the scan lines, and the first connection layer at an intersecting position with the scan line is disconnected, and the second connection layer is in the same pattern layer with the data lines and crosses with the scan lines.
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公开(公告)号:US09859436B2
公开(公告)日:2018-01-02
申请号:US14778607
申请日:2015-06-24
Inventor: Wenshuai Guo , Xing Ming , Zhiyuan Shen
IPC: H01L29/786 , H01L29/423 , H01L27/12 , H01L29/66
CPC classification number: H01L29/78675 , H01L27/12 , H01L27/1222 , H01L27/1288 , H01L29/42384 , H01L29/6675 , H01L29/66757 , H01L29/786 , H01L29/78606 , H01L29/78645 , H01L29/78696
Abstract: The present invention provides a manufacture method of a TFT substrate structure and a TFT substrate structure. In the manufacture method of the TFT substrate structure, as manufacturing the gate, a plurality of metal sections distributed in spaces are formed at two sides of the gate, and the gate and the plurality of metal sections are employed to be a mask to implement ion implantation to the polysilicon layer. In the TFT substrate structure according to the present invention, the undoped areas are formed among the n-type heavy doping areas while forming the n-type heavy doping areas at the polysilicon layer.
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公开(公告)号:US20170222061A1
公开(公告)日:2017-08-03
申请号:US14778607
申请日:2015-06-24
Inventor: Wenshuai Guo , Xing Ming , Zhiyuan Shen
IPC: H01L29/786 , H01L29/423 , H01L29/66 , H01L27/12
CPC classification number: H01L29/78675 , H01L27/12 , H01L27/1222 , H01L27/1288 , H01L29/42384 , H01L29/6675 , H01L29/66757 , H01L29/786 , H01L29/78606 , H01L29/78645 , H01L29/78696
Abstract: The present invention provides a manufacture method of a TFT substrate structure and a TFT substrate structure. In the manufacture method of the TFT substrate structure, as manufacturing the gate, a plurality of metal sections distributed in spaces are formed at two sides of the gate, and the gate and the plurality of metal sections are employed to be a mask to implement ion implantation to the polysilicon layer. In the TFT substrate structure according to the present invention, the undoped areas are formed among the n-type heavy doping areas while forming the n-type heavy doping areas at the polysilicon layer.
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公开(公告)号:US10571736B2
公开(公告)日:2020-02-25
申请号:US14897656
申请日:2015-09-06
Applicant: Shenzhen China Star Optoelectronics Technology Co., Ltd. , Wuhan China Star Optoelectronics Technology Co., Ltd.
Inventor: Xing Ming
IPC: G02F1/1335 , G02F1/1362 , G02F1/00 , G02F1/1343 , G02F1/1333
Abstract: A method for manufacturing an array substrate and an array substrate are disclosed. The method comprises the steps of forming a plurality of control electrodes on a baseplate, and forming a color-resist region between two adjacent control electrodes, wherein the color-resist region is a first color-resist region, a second color-resist region, a third color-resist region, and a fourth color-resist region in sequence; forming a first color-resist in the first color-resist region, forming a second color-resist in the second color-resist region, and forming a third color-resist in the third color-resist region; and coating the baseplate on which the control electrodes, the first color-resist, the second color-resist, and the third color-resist are formed and the fourth color-resist region with a transparent photoresist so as to form a flat layer. In the method according to the present disclosure, the production efficiency of the array substrate can be improved.
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公开(公告)号:US20170170202A1
公开(公告)日:2017-06-15
申请号:US14778606
申请日:2015-06-24
Inventor: Wenshuai Guo , Xing Ming , Zhiyuan Shen
IPC: H01L27/12 , H01L29/66 , H01L29/49 , H01L29/51 , H01L29/786 , H01L29/423
CPC classification number: H01L27/127 , H01L27/1222 , H01L29/16 , H01L29/42384 , H01L29/4908 , H01L29/51 , H01L29/518 , H01L29/66598 , H01L29/66757 , H01L29/78621 , H01L29/78627 , H01L29/78675 , H01L29/78696
Abstract: The present invention provides a manufacture method of a TFT substrate structure and a TFT substrate structure. In the manufacture method of the TFT substrate structure according to the present invention, by adjusting the parameter of etching as manufacturing the gate, the angular surfaces are formed at the two sides of the gate, and the gate is used to be a mask to implement ion implantation to the polysilicon layer to form the n-type heavy doping area and the n-type light doping area are formed at the polysilicon layer at the same time. In the TFT structure according to the present invention, the polysilicon layer comprises n-type heavy doping areas at two sides and n-type light doping areas between the channel area of the polysilicon layer and the n-type heavy doping areas.
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