公开(公告)号：US20240079371A1

公开(公告)日：2024-03-07

申请号：US17902506

申请日：2022-09-02

申请人： GlobalFoundries U.S. Inc.

发明人： John C. MALINOWSKI ,  Zhuojie WU

IPC分类号： H01L23/00 ,  H01L23/34

CPC分类号： H01L24/73 ,  H01L23/34 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/29 ,  H01L24/30 ,  H01L24/32 ,  H01L24/33 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L23/49816 ,  H01L2224/13147 ,  H01L2224/14132 ,  H01L2224/14135 ,  H01L2224/16227 ,  H01L2224/29012 ,  H01L2224/2929 ,  H01L2224/29338 ,  H01L2224/29386 ,  H01L2224/30505 ,  H01L2224/32052 ,  H01L2224/32225 ,  H01L2224/33051 ,  H01L2224/331 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/81224 ,  H01L2224/81815 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/83203 ,  H01L2924/01014 ,  H01L2924/0503 ,  H01L2924/05442 ,  H01L2924/0665

摘要： The present disclosure relates to radio frequency (RF) chip packages and, more particularly, to improved thermal performance of RF chip packages and methods of manufacture. The structure includes: a board; a chip substrate; a pattern of solder bumps between the board and the chip substrate; and a thermal conductive material between the chip substrate and the board in depopulated regions of solder bumps of the chip substrate.

公开(公告)号：US20240079306A1

公开(公告)日：2024-03-07

申请号：US17930304

申请日：2022-09-07

申请人： Micron Technology, Inc.

发明人： Kelvin Tan Aik Boo ,  Wen Wei Lum ,  Hong Wan Ng

IPC分类号： H01L23/498 ,  H01L21/48 ,  H01L23/00

CPC分类号： H01L23/49838 ,  H01L21/4846 ,  H01L23/49816 ,  H01L23/49894 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/13 ,  H01L24/48 ,  H01L2224/13147 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48225 ,  H01L2224/73204 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2224/81815 ,  H01L2924/1433 ,  H01L2924/1438 ,  H01L2924/35121

摘要： A microelectronic device package includes a microelectronic device, a masking material defined (MMD) contact, and a non-masking material defined (NMMD) contact. The microelectronic device is supported on, and electrically connected to, one of a package substrate and a redistribution layer. The MMD contact is located in a first region of the one of the package substrate and the redistribution layer and facilitates a first electrical connection between the microelectronic device and the one of the package substrate and the redistribution layer. The NMMD contact is located in a second, different region of the one of the package substrate and the redistribution layer and facilitates a second electrical connection between the microelectronic device and the one of the package substrate and the redistribution layer. Related methods and systems are also disclosed.

公开(公告)号：US11923332B2

公开(公告)日：2024-03-05

申请号：US17552830

申请日：2021-12-16

申请人： Micron Technology, Inc.

发明人： Jungbae Lee

IPC分类号： H01L23/00

CPC分类号： H01L24/32 ,  H01L24/13 ,  H01L24/16 ,  H01L24/73 ,  H01L2224/10122 ,  H01L2224/13147 ,  H01L2224/13611 ,  H01L2224/13639 ,  H01L2224/26145 ,  H01L2224/73204

摘要： A semiconductor device having a capillary flow structure for a direct chip attachment is provided herein. The semiconductor device generally includes a substrate and a semiconductor die having a conductive pillar electrically coupled to the substrate. The front side of the semiconductor die may be spaced a distance apart from the substrate forming a gap. The semiconductor device further includes first and second elongate capillary flow structures projecting from the front side of the semiconductor die at least partially extending toward the substrate. The first and second elongate capillary flow structures may be spaced apart from each other at a first width configured to induce capillary flow of an underfill material along a length of the first and second elongate capillary flow structures. The first and second capillary flow structures may include pairs of elongate capillary flow structures forming passageways therebetween to induce capillary flow at an increased flow rate.

公开(公告)号：US11923323B2

公开(公告)日：2024-03-05

申请号：US17843986

申请日：2022-06-18

申请人： QUALCOMM Incorporated

发明人： Ibrahim Ramez Chamas ,  Mohamed Abouzied ,  Bhushan Shanti Asuri

IPC分类号： H01L23/66 ,  H01L23/00 ,  H01L23/58 ,  H03H7/42 ,  H04B1/40

CPC分类号： H01L23/66 ,  H01L23/562 ,  H01L23/585 ,  H01L24/13 ,  H03H7/42 ,  H01L2223/6655 ,  H01L2223/6677 ,  H01L2224/13026 ,  H01L2224/13147 ,  H01L2924/19051 ,  H01L2924/3512 ,  H04B1/40

摘要： An RF flip chip is provided in which a local bump region adjacent a die corner includes a balun having a centrally-located bump.

公开(公告)号：US20240071990A1

公开(公告)日：2024-02-29

申请号：US17896030

申请日：2022-08-25

申请人： Micron Technology, Inc.

发明人： Kelvin Tan Aik Boo ,  Seng Kim Ye ,  Hong Wan Ng ,  Ling Pan ,  See Hiong Leow

IPC分类号： H01L23/00 ,  H01L21/48 ,  H01L23/498

CPC分类号： H01L24/81 ,  H01L21/4846 ,  H01L23/49838 ,  H01L24/13 ,  H01L24/16 ,  H01L2224/13082 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13166 ,  H01L2224/13169 ,  H01L2224/13173 ,  H01L2224/13176 ,  H01L2224/13178 ,  H01L2224/1318 ,  H01L2224/13181 ,  H01L2224/13183 ,  H01L2224/13184 ,  H01L2224/16238 ,  H01L2224/81385 ,  H01L2224/81439 ,  H01L2224/81444 ,  H01L2224/81447 ,  H01L2224/81455 ,  H01L2224/81466 ,  H01L2224/81469 ,  H01L2224/81473 ,  H01L2224/81476 ,  H01L2224/81478 ,  H01L2224/8148 ,  H01L2224/81481 ,  H01L2224/81483 ,  H01L2224/81484 ,  H01L2224/81815 ,  H01L2924/3841

摘要： A semiconductor device assembly including a semiconductor device having a plurality of pillars disposed on a backside surface of the semiconductor device; and a substrate, including: a solder mask layer disposed on a front side surface of the substrate, a plurality of extended bond pads disposed on the frontside surface of the substrate and surrounded by the solder mask layer, the plurality of extended bond pads each having a top surface higher than a top surface of the solder mask layer, and wherein the semiconductor device is directly attached to the substrate by bonding each of the plurality of pillars of the semiconductor device to the top surface of a corresponding one of the plurality of extended bond pads with a solder connection.

公开(公告)号：US20240071972A1

公开(公告)日：2024-02-29

申请号：US17823162

申请日：2022-08-30

申请人： Micron Technology, Inc.

发明人： Hidenori Yamaguchi ,  Keizo Kawakita ,  Bang-Ning Hsu

IPC分类号： H01L23/00 ,  H01L25/065 ,  H01L25/18

CPC分类号： H01L24/14 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L25/0657 ,  H01L25/18 ,  H01L2224/11464 ,  H01L2224/11912 ,  H01L2224/13014 ,  H01L2224/13016 ,  H01L2224/13082 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/1403 ,  H01L2224/14051 ,  H01L2224/14134 ,  H01L2224/14154 ,  H01L2224/14177 ,  H01L2224/14181 ,  H01L2224/16145 ,  H01L2225/06513 ,  H01L2924/1431 ,  H01L2924/1436

摘要： Apparatus and methods are disclosed, including stacked die devices and systems. Example stacked die devices and methods include an array of interconnect pillars that includes more than one pillar height. Example stacked die devices and methods include an array of interconnect pillars that includes a pillar height distribution mapped to a known warpage profile.

公开(公告)号：US20240071896A1

公开(公告)日：2024-02-29

申请号：US18361482

申请日：2023-07-28

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： Jin Won CHAE ,  Moon Gil JUNG ,  Kwang-Bae KIM ,  So Yoen PARK ,  Hyung Jun CHOI

IPC分类号： H01L23/498 ,  H01L21/48 ,  H01L23/00 ,  H01L23/31 ,  H01L25/10

CPC分类号： H01L23/49838 ,  H01L21/4857 ,  H01L23/3128 ,  H01L24/20 ,  H01L25/105 ,  H01L23/49822 ,  H01L24/13 ,  H01L24/16 ,  H01L24/48 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/16227 ,  H01L2224/2105 ,  H01L2224/211 ,  H01L2224/48091 ,  H01L2224/48105 ,  H01L2224/48227 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/014

摘要： A semiconductor package includes a redistribution substrate having a first side and an opposite second side. A plurality of redistribution patterns are in the redistribution substrate, and a semiconductor chip is on the first side of the redistribution substrate. A plurality of metal pillars are positioned around and spaced apart from a periphery of the semiconductor chip and are connected to the redistribution patterns. A plurality of solder balls are on the second side of the redistribution substrate. Each of the metal pillars includes a third side facing the first side of the redistribution substrate, and an opposite fourth side. The fourth side has a square or octagonal shape in plan view.

公开(公告)号：US11916023B2

公开(公告)日：2024-02-27

申请号：US17012255

申请日：2020-09-04

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Sung-Hui Huang ,  Da-Cyuan Yu ,  Kuan-Yu Huang ,  Pai Yuan Li ,  Hsiang-Fan Lee

IPC分类号： H01L21/56 ,  H01L21/48 ,  H01L23/00 ,  H01L23/31 ,  H01L23/367 ,  H01L23/373 ,  H01L23/498 ,  H01L25/00 ,  H01L25/065 ,  H01L25/18

CPC分类号： H01L23/562 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/486 ,  H01L21/4882 ,  H01L21/563 ,  H01L21/565 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/3675 ,  H01L23/3733 ,  H01L23/3736 ,  H01L23/3737 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L24/32 ,  H01L24/83 ,  H01L25/0655 ,  H01L25/18 ,  H01L25/50 ,  H01L23/367 ,  H01L24/16 ,  H01L24/73 ,  H01L24/97 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/26175 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/83385 ,  H01L2224/83951 ,  H01L2224/92225 ,  H01L2924/00014 ,  H01L2924/10158 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/165 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/35121 ,  H01L2224/73204 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2924/00012 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/15311 ,  H01L2224/73204 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2224/13099

摘要： A package includes a package component, a device die over and bonded to the package component, a metal cap having a top portion over the device die, and a thermal interface material between and contacting the device die and the metal cap. The thermal interface material includes a first portion directly over an inner portion of the device die, and a second portion extending directly over a corner region of the device die. The first portion has a first thickness. The second portion has a second thickness greater than the first thickness.

公开(公告)号：US11901319B2

公开(公告)日：2024-02-13

申请号：US17233967

申请日：2021-04-19

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Hui-Min Huang ,  Chih-Wei Lin ,  Tsai-Tsung Tsai ,  Ming-Da Cheng ,  Chung-Shi Liu ,  Chen-Hua Yu

IPC分类号： H01L23/538 ,  H01L23/31 ,  H01L21/56 ,  H01L21/48 ,  H01L23/498 ,  H01L23/48 ,  H01L23/00

CPC分类号： H01L24/05 ,  H01L21/481 ,  H01L21/486 ,  H01L21/56 ,  H01L21/561 ,  H01L23/3114 ,  H01L23/3135 ,  H01L23/481 ,  H01L23/49811 ,  H01L23/49833 ,  H01L23/49838 ,  H01L23/49861 ,  H01L23/49866 ,  H01L23/5389 ,  H01L24/07 ,  H01L24/13 ,  H01L24/19 ,  H01L24/96 ,  H01L21/568 ,  H01L23/49827 ,  H01L2224/0239 ,  H01L2224/02372 ,  H01L2224/0401 ,  H01L2224/05083 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05184 ,  H01L2224/12105 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29386 ,  H01L2224/83191 ,  H01L2224/94 ,  H01L2924/01029 ,  H01L2924/18162 ,  H01L2224/94 ,  H01L2224/03 ,  H01L2224/94 ,  H01L2224/27

摘要： A first protective layer is formed on a first die and a second die, and openings are formed within the first protective layer. The first die and the second die are encapsulated such that the encapsulant is thicker than the first die and the second die, and vias are formed within the openings. A redistribution layer can also be formed to extend over the encapsulant, and the first die may be separated from the second die.

公开(公告)号：US20240047498A1

公开(公告)日：2024-02-08

申请号：US18490217

申请日：2023-10-19

申请人： SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

发明人： Shou-Chian HSU

IPC分类号： H01L27/146 ,  H01L23/00

CPC分类号： H01L27/14636 ,  H01L27/14618 ,  H01L27/14687 ,  H01L24/13 ,  H01L2224/13147 ,  H01L2224/13024

摘要： Implementations of semiconductor packages may include: a semiconductor die having a first side and a second side and an active area on the second side of the die. The semiconductor packages may also include two or more bumps coupled to two or more die pads on a second side of the die. The semiconductor packages may include an optically transmissive lid coupled to the semiconductor die through an adhesive, two or more bumps, and a first redistribution layer (RDL). The semiconductor package may include a second redistribution layer (RDL) coupled with the first RDL on the second side of the semiconductor die. The second RDL may extend to the first side of the semiconductor die. The first RDL may extend to an edge of the semiconductor die.