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    NEUROMORPHIC METHOD AND APPARATUS WITH MULTI-BIT NEUROMORPHIC OPERATION
    41.
    发明申请
    NEUROMORPHIC METHOD AND APPARATUS WITH MULTI-BIT NEUROMORPHIC OPERATION 审中-公开

    公开(公告)号：US20200074286A1

    公开(公告)日：2020-03-05

    申请号：US16556424

    申请日：2019-08-30

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Sungho KIM ,  Cheheung KIM ,  Jaeho LEE

    IPC: G06N3/063 ,  G11C11/54 ,  G06F7/501 ,  G06F7/523

    Abstract: A neuromorphic apparatus configured to process a multi-bit neuromorphic operation including a single axon circuit, a single synaptic circuit, a single neuron circuit, and a controller. The single axon circuit is configured to receive, as a first input, an i-th bit of an n-bit axon. The single synaptic circuit is configured to store, as a second input, a j-th bit of an m-bit synaptic weight and output a synaptic operation value between the first input and the second input. The single neuron circuit is configured to obtain each bit value of a multi-bit neuromorphic operation result between the n-bit axon and the m-bit synaptic weight, based on the output synaptic operation value. The controller is configured to respectively determine the i-th bit and the j-th bit to be sequentially assigned for each time period of different time periods to the single axon circuit and the single synaptic circuit.

    AVALANCHE PHOTODETECTORS AND IMAGE SENSORS INCLUDING THE SAME
    43.
    发明申请
    AVALANCHE PHOTODETECTORS AND IMAGE SENSORS INCLUDING THE SAME 审中-公开

    公开(公告)号：US20190157491A1

    公开(公告)日：2019-05-23

    申请号：US15942659

    申请日：2018-04-02

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Sanghyun JO ,  Jaeho LEE ,  Haeryong KIM ,  Hyeonjin SHIN

    IPC: H01L31/107 ,  H01L27/146 ,  H01L31/02 ,  H01L31/0224 ,  H01L31/0352 ,  H01S5/0687 ,  G01S7/481 ,  G01S17/93

    Abstract: A photodetector having a small form factor and having high detection efficiency with respect to both visible light and infrared rays may include a first electrode, a collector layer on the first electrode, a tunnel barrier layer on the collector layer, a graphene layer on the tunnel barrier layer, an emitter layer on the graphene layer, and a second electrode on the emitter layer. The photodetector may be included in an image sensor. An image sensor may include a substrate, an insulating layer on the substrate, and a plurality of photodetectors on the insulating layer. The photodetectors may be aligned with each other in a direction extending parallel or perpendicular to a top surface of the insulating layer. The photodetector may be included in a LiDAR system.

    FLEXIBLE DEVICE HAVING FLEXIBLE INTERCONNECT LAYER USING TWO-DIMENSIONAL MATERIALS
    45.
    发明申请
    FLEXIBLE DEVICE HAVING FLEXIBLE INTERCONNECT LAYER USING TWO-DIMENSIONAL MATERIALS 审中-公开
    具有两维材料的柔性互连层的柔性器件

    公开(公告)号：US20160343670A1

    公开(公告)日：2016-11-24

    申请号：US14932439

    申请日：2015-11-04

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Jaeho LEE ,  Taeho Kim ,  Seongjun Park

    IPC: H01L23/532 ,  H01L23/538 ,  H01L23/48 ,  H01L23/528

    CPC classification number: H01L23/53276 ,  H01L23/4985 ,  H01L23/5328

    Abstract: A flexible device includes an electronic device having an electrode and a flexible interconnect layer formed on the electrode. The flexible interconnect layer includes a two-dimensional (2D) material and a conductive polymer to have high electric conductivity and flexibility. The flexible device includes a flexible interconnect layer of one or more layers, and in this case, includes a low-dielectric constant dielectric layer between the respective layers.

    Abstract translation: 柔性器件包括具有形成在电极上的电极和柔性互连层的电子器件。 柔性互连层包括具有高电导率和柔性的二维（2D）材料和导电聚合物。 柔性器件包括一个或多个层的柔性互连层，并且在这种情况下，其包括各层之间的低介电常数介电层。

    ELECTRONIC DEVICE INCLUDING SIDE GATE AND TWO-DIMENSIONAL MATERIAL CHANNEL AND METHOD OF MANUFACTURING THE ELECTRONIC DEVICE
    47.
    发明申请
    ELECTRONIC DEVICE INCLUDING SIDE GATE AND TWO-DIMENSIONAL MATERIAL CHANNEL AND METHOD OF MANUFACTURING THE ELECTRONIC DEVICE 有权
    包括侧门和二维材料通道的电子设备及其制造方法

    公开(公告)号：US20160300908A1

    公开(公告)日：2016-10-13

    申请号：US14932395

    申请日：2015-11-04

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： JINSEONG HEO ,  Kiyoung LEE ,  Jaeho LEE ,  Seongjun PARK

    IPC: H01L29/06 ,  H01L21/225 ,  H01L29/423 ,  H01L21/02 ,  H01L29/78 ,  H01L29/66

    CPC classification number: H01L29/0665 ,  H01L21/2253 ,  H01L29/0649 ,  H01L29/41733 ,  H01L29/4236 ,  H01L29/42384 ,  H01L29/66477 ,  H01L29/78 ,  H01L29/785 ,  H01L29/78648 ,  H01L29/78681 ,  H01L29/78684 ,  H01L29/78687 ,  H01L29/78696

    Abstract: Provided are electronic devices and methods of manufacturing same. An electronic device includes an energy barrier forming layer on a substrate, an upper channel material layer on the substrate, and a gate electrode that covers the upper channel material layer and the energy barrier forming layer. The gate electrode includes a side gate electrode portion that faces a side surface of the energy barrier forming layer. The side gate electrode may be configured to cause an electric field to be applied directly on the energy barrier forming layer via the side surface of the energy barrier forming layer, thereby enabling adjustment of the energy barrier between the energy barrier forming layer and the upper channel material layer. The electronic device may further include a lower channel material layer that is provided on the substrate and does not contact the upper channel material layer.

    Abstract translation: 提供电子装置及其制造方法。 电子设备包括在基板上的能量阻挡层形成层，在基板上的上部沟道材料层，以及覆盖上部沟道材料层和能量阻挡层形成层的栅电极。 栅电极包括面向能阻层形成层的侧表面的侧栅电极部分。 侧栅电极可以被配置为经由能量阻挡形成层的侧表面直接施加到能量阻挡形成层上的电场，从而能够调节能量阻挡形成层和上通道之间的能量势垒 材料层。 电子设备还可以包括设置在基板上并且不接触上通道材料层的下通道材料层。

    CAPACITOR AND SEMICONDUCTOR DEVICE INCLUDING THE SAME
    50.
    发明申请
    CAPACITOR AND SEMICONDUCTOR DEVICE INCLUDING THE SAME 有权

    公开(公告)号：US20240429267A1

    公开(公告)日：2024-12-26

    申请号：US18515009

    申请日：2023-11-20

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Jeongil BANG ,  Haeryong KIM ,  Jaeho LEE ,  Jooho LEE

    IPC: H01G4/008 ,  H10B12/00

    Abstract: A capacitor includes a first electrode including a conductive layer, a second electrode spaced apart from the first electrode, a dielectric layer disposed between the first electrode and the second electrode, and an interfacial layer disposed between the first electrode and the dielectric layer, wherein the conductive layer includes a first element, a second element, and a third element, the first element includes Ti or Al, the second element includes Ti, Al, Hf, Zr, Ta, Cr, Y, Sc, Si, Nb, Mo, V, W, Mn, Ni, or Co, the third element includes N, the first element and the second element are different from each other, and the conductive layer has a rock salt crystal structure.

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