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1.
公开(公告)号:US20230420490A1
公开(公告)日:2023-12-28
申请号:US18465439
申请日:2023-09-12
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jeonggyu SONG , Kyooho JUNG , Younsoo KIM , Haeryong KIM , Jooho LEE
IPC: H10B12/00 , H01L21/285
CPC classification number: H01L28/60 , H01L21/28556 , H10B12/30
Abstract: A capacitor includes: a lower electrode including a metal nitride represented by MM′N, wherein M is a metal element, M′ is an element different from M, and N is nitrogen; a dielectric layer on the lower electrode; an interfacial layer between the lower electrode and the dielectric layer and including a metal nitrate represented by MM′ON, wherein M is a metal element, M′ is an element different from M, N is nitrogen, and O is oxygen; and an upper electrode on the dielectric layer.
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2.
公开(公告)号:US20230255019A1
公开(公告)日:2023-08-10
申请号:US18136984
申请日:2023-04-20
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Chang-Su WOO , Haeryong KIM , Younsoo KIM , Sunmin MOON , Jeonggyu SONG , Kyooho JUNG
IPC: H10B12/00
CPC classification number: H10B12/315 , H10B12/033 , H10B12/34
Abstract: A semiconductor device includes conductive pillars on a semiconductor substrate, a first support pattern that contacts first portions of lateral surfaces of the conductive pillars and connects the conductive pillars to each other, the first support pattern including first support holes that expose second portions of the lateral surfaces of the conductive pillars, a capping conductive pattern that contacts the second portions of the lateral surfaces of the conductive pillars and exposes the first support pattern, the second portions of the lateral surfaces of the conductive pillars being in no contact with the first support pattern, and a dielectric layer that covers the first support pattern and the capping conductive pattern, the dielectric layer being spaced apart from the conductive pillars.
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3.
公开(公告)号:US20220278192A1
公开(公告)日:2022-09-01
申请号:US17749240
申请日:2022-05-20
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jeonggyu SONG , Kyooho JUNG , Younsoo KIM , Haeryong KIM , Jooho LEE
IPC: H01L49/02 , H01L21/285 , H01L27/108
Abstract: A capacitor includes: a lower electrode including a metal nitride represented by MM′N, wherein M is a metal element, M′ is an element different from M, and N is nitrogen; a dielectric layer on the lower electrode; an interfacial layer between the lower electrode and the dielectric layer and including a metal nitrate represented by MM′ON, wherein M is a metal element, M′ is an element different from M, N is nitrogen, and O is oxygen; and an upper electrode on the dielectric layer.
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4.
公开(公告)号:US20210118982A1
公开(公告)日:2021-04-22
申请号:US16839641
申请日:2020-04-03
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jeonggyu SONG , Kyooho JUNG , Younsoo KIM , Haeryong KIM , Jooho LEE
IPC: H01L49/02 , H01L27/108 , H01L21/285
Abstract: A capacitor includes: a lower electrode including a metal nitride represented by MM′N, wherein M is a metal element, M′ is an element different from M, and N is nitrogen; a dielectric layer on the lower electrode; an interfacial layer between the lower electrode and the dielectric layer and including a metal nitrate represented by MM′ON, wherein M is a metal element, M′ is an element different from M, N is nitrogen, and O is oxygen; and an upper electrode on the dielectric layer.
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5.
公开(公告)号:US20180358470A1
公开(公告)日:2018-12-13
申请号:US15892850
申请日:2018-02-09
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jaeho LEE , Haeryong KIM , Sanghyun JO , Hyeonjin SHIN
IPC: H01L29/788 , H01L29/423 , H01L29/49 , H01L27/11521 , G11C11/54 , G11C11/56
CPC classification number: H01L29/7887 , B82Y10/00 , G11C11/54 , G11C11/56 , G11C11/5621 , G11C11/5628 , G11C11/5642 , G11C13/025 , G11C16/0441 , G11C16/10 , G11C16/26 , G11C2211/5612 , G11C2213/35 , H01L21/28273 , H01L27/11521 , H01L29/0673 , H01L29/42324 , H01L29/42332 , H01L29/49 , H01L29/78684 , H01L29/78687
Abstract: Provided are nonvolatile memory devices including 2-dimensional (2D) material and apparatuses including the nonvolatile memory devices. A nonvolatile memory device may include a storage stack including a plurality of charge storage layers between a channel element and a gate electrode facing the channel element. The plurality of charge storage layers may include a 2D material. An interlayer barrier layer may be further provided between the plurality of charge storage layers. The nonvolatile memory device may have a multi-bit or multi-level memory characteristic due to the plurality of charge storage layers.
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公开(公告)号:US20250137123A1
公开(公告)日:2025-05-01
申请号:US18830845
申请日:2024-09-11
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jungmin PARK , Haeryong KIM , Boeun PARK , Jeongil BANG , Jooho LEE , Hanjin LIM , Hyungsuk JUNG , Sumin HWANG
IPC: C23C16/455 , C23C16/40 , C23C16/44 , H01L27/06 , H10B12/00
Abstract: A method of manufacturing a multi-component thin film includes providing a substrate into a process chamber, performing a first cycle, the first cycle including forming a first atomic layer including a first precursor on the substrate by using an atomic layer deposition process, performing a third cycle, the third cycle including injecting an additive onto the first atomic layer, and performing a second cycle, the second cycle including forming a second atomic layer including a second precursor on the first atomic layer and the additive by using an atomic layer deposition process, wherein a thermal decomposition temperature of the additive is lower than each of a thermal decomposition temperature of the first precursor and a thermal decomposition temperature of the second precursor.
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公开(公告)号:US20230335665A1
公开(公告)日:2023-10-19
申请号:US18338631
申请日:2023-06-21
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sanghyun JO , Jaeho LEE , Haeryong KIM , Hyeonjin SHIN
IPC: H01L31/107 , H01L31/02 , H01L31/0224 , H01L31/0352 , H01S5/0687 , G01S7/481 , H01L31/028 , H01L31/032 , H01L27/146 , H01L31/101 , G01S17/931 , H10K39/32
CPC classification number: H01L31/1075 , H01L31/02027 , H01L31/022466 , H01L31/03529 , H01S5/0687 , G01S7/4816 , G01S7/4817 , H01L31/028 , H01L31/032 , H01L27/14643 , H01L31/035209 , H01L27/14647 , H01L31/035281 , H01L31/1013 , G01S17/931 , H10K39/32 , G05D2201/0213 , H01L31/0304
Abstract: A photodetector having a small form factor and having high detection efficiency with respect to both visible light and infrared rays may include a first electrode, a collector layer on the first electrode, a tunnel barrier layer on the collector layer, a graphene layer on the tunnel barrier layer, an emitter layer on the graphene layer, and a second electrode on the emitter layer. The photodetector may be included in an image sensor. An image sensor may include a substrate, an insulating layer on the substrate, and a plurality of photodetectors on the insulating layer. The photodetectors may be aligned with each other in a direction extending parallel or perpendicular to a top surface of the insulating layer. The photodetector may be included in a LiDAR system.
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公开(公告)号:US20220367745A1
公开(公告)日:2022-11-17
申请号:US17857466
申请日:2022-07-05
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sanghyun JO , Jaeho LEE , Haeryong KIM , Hyeonjin SHIN
IPC: H01L31/107 , H01L31/02 , H01L31/0224 , H01L31/0352 , H01S5/0687 , G01S7/481 , H01L31/028 , H01L31/032 , H01L27/146 , H01L31/101 , H01L27/30 , G01S17/931
Abstract: A photodetector having a small form factor and having high detection efficiency with respect to both visible light and infrared rays may include a first electrode, a collector layer on the first electrode, a tunnel barrier layer on the collector layer, a graphene layer on the tunnel barrier layer, an emitter layer on the graphene layer, and a second electrode on the emitter layer. The photodetector may be included in an image sensor. An image sensor may include a substrate, an insulating layer on the substrate, and a plurality of photodetectors on the insulating layer. The photodetectors may be aligned with each other in a direction extending parallel or perpendicular to a top surface of the insulating layer. The photodetector may be included in a LiDAR system.
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公开(公告)号:US20210384194A1
公开(公告)日:2021-12-09
申请号:US17172131
申请日:2021-02-10
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Chang-Su WOO , Haeryong KIM , Younsoo KIM , Sunmin MOON , Jeonggyu SONG , Kyooho JUNG
IPC: H01L27/108
Abstract: A semiconductor device includes conductive pillars on a semiconductor substrate, a first support pattern that contacts first portions of lateral surfaces of the conductive pillars and connects the conductive pillars to each other, the first support pattern including first support holes that expose second portions of the lateral surfaces of the conductive pillars, a capping conductive pattern that contacts the second portions of the lateral surfaces of the conductive pillars and exposes the first support pattern, the second portions of the lateral surfaces of the conductive pillars being in no contact with the first support pattern, and a dielectric layer that covers the first support pattern and the capping conductive pattern, the dielectric layer being spaced apart from the conductive pillars.
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公开(公告)号:US20200273698A1
公开(公告)日:2020-08-27
申请号:US16520990
申请日:2019-07-24
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jeonggyu SONG , Kyooho JUNG , Yongsung KIM , Jeongil BANG , Jooho LEE , Junghwa KIM , Haeryong KIM , Myoungho JEONG
IPC: H01L21/02 , H01L29/786 , H01L29/66 , H01L21/768
Abstract: A semiconductor device and a method of manufacturing the semiconductor device are included. The method of manufacturing the semiconductor device includes forming a hafnium oxide layer on a substrate and crystallizing the hafnium oxide layer by using a hafnium cobalt oxide layer as a seed layer. According to the method of manufacturing the semiconductor device, a thin-film hafnium oxide layer may be easily crystallized.
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