知搜-全球专利检索

  1. Login
  2. Sign Up

Search Results

27 records (took 0.019 seconds)

    METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
    2.
    发明申请
    METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE 审中-公开

    公开(公告)号：US20200273747A1

    公开(公告)日：2020-08-27

    申请号：US16711845

    申请日：2019-12-12

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Seung-min RYU ,  Younsoo KIM ,  Gyu-hee PARK ,  Jaesoon LIM ,  Younjoung CHO

    IPC: H01L21/768 ,  H01L21/285 ,  H01L27/108 ,  H01L21/8238

    Abstract: A method of manufacturing a semiconductor device, the method including providing a metal precursor on a substrate to form a preliminary layer that includes a first metal; providing a reducing agent on the preliminary layer, the reducing agent including a compound that includes a second metal; and providing a reactant on the preliminary layer to form a metal-containing layer, wherein the second metal has multiple oxidation states, the second metal in the reducing agent having a lower oxidation state among the multiple oxidation states prior to providing the reducing agent on the preliminary layer.

    SEMICONDUCTOR DEVICE INCLUDING CAPACITOR AND METHOD OF FABRICATING THE SAME
    4.
    发明申请
    SEMICONDUCTOR DEVICE INCLUDING CAPACITOR AND METHOD OF FABRICATING THE SAME 有权
    包括电容器的半导体器件及其制造方法

    公开(公告)号：US20160104763A1

    公开(公告)日：2016-04-14

    申请号：US14863820

    申请日：2015-09-24

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Yunjung CHOI ,  Se Hoon OH ,  Jin-Su LEE ,  Younsoo KIM ,  HanJin LIM

    IPC: H01L49/02

    CPC classification number: H01L28/75 ,  H01L28/90

    Abstract: A semiconductor device includes a lower electrode on a lower structure, a dielectric layer conformally covering a surface of the lower electrode, an upper electrode conformally covering a surface of the dielectric layer, and a barrier layer on the upper electrode. The barrier layer and the upper electrode define a space on a sidewall of the lower electrode.

    Abstract translation: 半导体器件包括下部结构的下部电极，保形地覆盖下部电极的表面的电介质层，保持覆盖电介质层的表面的上部电极和上部电极上的阻挡层。 阻挡层和上电极在下电极的侧壁上形成空间。

    SEMICONDUCTOR MEMORY DEVICES AND METHODS OF FABRICATING THE SAME
    7.
    发明申请
    SEMICONDUCTOR MEMORY DEVICES AND METHODS OF FABRICATING THE SAME 有权

    公开(公告)号：US20220157823A1

    公开(公告)日：2022-05-19

    申请号：US17592555

    申请日：2022-02-04

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Kyooho JUNG ,  Jeong-gyu SONG ,  Younsoo KIM ,  Jooho LEE

    IPC: H01L27/108 ,  H01L49/02 ,  H01L21/02

    Abstract: Disclosed are semiconductor memory devices and methods of fabricating the same. The semiconductor memory devices may include a capacitor including first and second electrodes and a dielectric layer. The dielectric layer may include a zirconium aluminum oxide layer including a first zirconium region adjacent to the first electrode, a first aluminum region, a second aluminum region adjacent to the second electrode, and a second zirconium region between the first and second aluminum regions. The first and second zirconium regions may include zirconium and oxygen and may be devoid of aluminum. The first and second aluminum regions may include aluminum and oxygen and may be devoid of zirconium. The first aluminum region and the first zirconium region may be spaced apart by a first distance, and the first aluminum region and the second zirconium region may be spaced apart by a second distance shorter than the first distance.

    SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
    8.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME 有权

    公开(公告)号：US20210384194A1

    公开(公告)日：2021-12-09

    申请号：US17172131

    申请日：2021-02-10

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Chang-Su WOO ,  Haeryong KIM ,  Younsoo KIM ,  Sunmin MOON ,  Jeonggyu SONG ,  Kyooho JUNG

    IPC: H01L27/108

    Abstract: A semiconductor device includes conductive pillars on a semiconductor substrate, a first support pattern that contacts first portions of lateral surfaces of the conductive pillars and connects the conductive pillars to each other, the first support pattern including first support holes that expose second portions of the lateral surfaces of the conductive pillars, a capping conductive pattern that contacts the second portions of the lateral surfaces of the conductive pillars and exposes the first support pattern, the second portions of the lateral surfaces of the conductive pillars being in no contact with the first support pattern, and a dielectric layer that covers the first support pattern and the capping conductive pattern, the dielectric layer being spaced apart from the conductive pillars.

    ELECTRICAL DEVICE AND SEMICONDUCTOR APPARATUS INCLUDING THE SAME
    10.
    发明公开
    ELECTRICAL DEVICE AND SEMICONDUCTOR APPARATUS INCLUDING THE SAME 审中-公开

    公开(公告)号：US20240088203A1

    公开(公告)日：2024-03-14

    申请号：US18512648

    申请日：2023-11-17

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Jeonggyu SONG ,  Younsoo KIM ,  Jooho LEE ,  Narae HAN

    IPC: H10B12/00

    CPC classification number: H01L28/56 ,  H01L28/60 ,  H10B12/315 ,  H10B12/34

    Abstract: Provided is a semiconductor device including a lower electrode, an upper electrode isolated from direct contact with the lower electrode, and a dielectric layer between the lower electrode and the upper electrode, the dielectric layer comprising a first metal oxide area, a second metal oxide area, and a third metal oxide area. The third metal oxide area is between the first metal oxide area and the second metal oxide area, and includes boron and one or more metal elements selected from aluminum (Al), magnesium (Mg), silicon (Si), or beryllium (Be). In the third metal oxide area, a content of boron (B) is less than or equal to a content of the metal elements of Al, Mg, Si, and/or Be.

Patent Agency Ranking