CAPACITOR AND DRAM DEVICE INCLUDING THE SAME

    公开(公告)号:US20220093603A1

    公开(公告)日:2022-03-24

    申请号:US17222006

    申请日:2021-04-05

    IPC分类号: H01L27/108 H01L49/02

    摘要: A capacitor and a DRAM device, the capacitor including a lower electrode; a dielectric layer structure on the lower electrode, the dielectric layer structure including a first zirconium oxide layer, a hafnium oxide layer, and a second zirconium oxide layer sequentially stacked; and an upper electrode on the dielectric layer structure, wherein the hafnium oxide layer has a tetragonal crystal phase or an orthorhombic crystal phase.

    SEMICONDUCTOR DEVICE
    3.
    发明公开

    公开(公告)号:US20240162281A1

    公开(公告)日:2024-05-16

    申请号:US18474072

    申请日:2023-09-25

    IPC分类号: H10B12/00

    摘要: A semiconductor device may include a substrate; a plurality of lower electrodes on the substrate; at least one supporter layer in contact with the plurality of lower electrodes; a dielectric layer on the plurality of lower electrodes and the at least one supporter layer; and an upper electrode on the dielectric layer. Each of the plurality of lower electrodes may include a first lower electrode and a second lower electrode on the first lower electrode. The at least one supporter layer may include a first supporter layer in contact with a side surface of an upper region of the first lower electrode. A level of an uppermost end of the second lower electrode may be higher than a level of an upper surface of the first supporter layer.

    CAPACITOR AND MEMORY DEVICE
    5.
    发明公开

    公开(公告)号:US20240315003A1

    公开(公告)日:2024-09-19

    申请号:US18675175

    申请日:2024-05-28

    IPC分类号: H10B12/00

    CPC分类号: H10B12/30 H01L28/55 H01L28/65

    摘要: A capacitor and a DRAM device, the capacitor including a lower electrode; a dielectric layer structure on the lower electrode, the dielectric layer structure including a first zirconium oxide layer, a hafnium oxide layer, and a second zirconium oxide layer sequentially stacked; and an upper electrode on the dielectric layer structure, wherein the hafnium oxide layer has a tetragonal crystal phase or an orthorhombic crystal phase.

    METHOD OF FORMING CAPACITOR AND METHOD OF MANUFACTURING DRAM ELEMENT BY USING THE SAME

    公开(公告)号:US20230363135A1

    公开(公告)日:2023-11-09

    申请号:US18121683

    申请日:2023-03-15

    IPC分类号: H10B12/00

    CPC分类号: H10B12/033

    摘要: A method of forming a capacitor includes forming lower electrodes including a first metal; forming a support layer pattern, which connects outer side walls of the lower electrodes to each other; forming a first interface layer including a first metal oxide having conductivity on the lower electrodes and the support layer pattern; forming a second interface layer including a second metal oxide having conductivity on the first interface layer; diffusing a second metal included in the second interface layer to a lower electrode surface so as to form a first interface structure including at least the first metal and the second metal on the lower electrode surface; completely removing at least the second interface structure formed on the support layer pattern through an etching process; forming a dielectric layer on the first interface structure and the support layer pattern; and forming an upper electrode on the dielectric layer.

    CAPACITOR AND MEMORY DEVICE
    7.
    发明公开

    公开(公告)号:US20230328958A1

    公开(公告)日:2023-10-12

    申请号:US18205715

    申请日:2023-06-05

    IPC分类号: H10B12/00

    CPC分类号: H10B12/30 H01L28/65 H01L28/55

    摘要: A capacitor and a DRAM device, the capacitor including a lower electrode; a dielectric layer structure on the lower electrode, the dielectric layer structure including a first zirconium oxide layer, a hafnium oxide layer, and a second zirconium oxide layer sequentially stacked; and an upper electrode on the dielectric layer structure, wherein the hafnium oxide layer has a tetragonal crystal phase or an orthorhombic crystal phase.

    METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE

    公开(公告)号:US20200273747A1

    公开(公告)日:2020-08-27

    申请号:US16711845

    申请日:2019-12-12

    摘要: A method of manufacturing a semiconductor device, the method including providing a metal precursor on a substrate to form a preliminary layer that includes a first metal; providing a reducing agent on the preliminary layer, the reducing agent including a compound that includes a second metal; and providing a reactant on the preliminary layer to form a metal-containing layer, wherein the second metal has multiple oxidation states, the second metal in the reducing agent having a lower oxidation state among the multiple oxidation states prior to providing the reducing agent on the preliminary layer.