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公开(公告)号：US20240268123A1
公开(公告)日：2024-08-08
申请号：US18370207
申请日：2023-09-19
发明人： Kiseok LEE , Jinwoo HAN , Hanjin LIM
摘要： A semiconductor device includes gate structure, bit line structure, contact plug structure, stack structure, and capacitor. The gate structure is disposed on first substrate. The bit line structure is disposed on the gate structure. The contact plug structure is disposed on the first substrate and spaced apart from the bit line structure. The stack structure is disposed on the bit line structure and the contact plug structure, and may include insulation layers and plate electrodes alternately stacked in a vertical direction substantially perpendicular to an upper surface of the first substrate. The capacitor includes a second electrode extending through the stack structure and contacting the contact plug structure. A ferroelectric pattern is disposed on a sidewall of the second electrode. First electrodes are disposed on a sidewall of the ferroelectric pattern, contact sidewalls of the plate electrodes, respectively, and are spaced apart from each other in the vertical direction.
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公开(公告)号：US20240237332A1
公开(公告)日：2024-07-11
申请号：US18394884
申请日：2023-12-22
发明人： Jungmin PARK , Hanjin LIM , Hyungsuk JUNG
IPC分类号： H10B12/00
CPC分类号： H10B12/315 , H01L28/60 , H10B12/34
摘要： A semiconductor device includes a structure including a conductive region, and a capacitor electrically connected to the conductive region of the structure. The capacitor includes a first electrode electrically connected to the conductive region, a second electrode on the first electrode, and a dielectric layer between the first electrode and the second electrode. At least one of the first electrode and the second electrode includes a first material layer including a first material region including a first crystalline region and a second crystalline region different from the first crystalline region, and a second material region between the first crystalline region and the second crystalline region, and a second material layer on the first material layer. At least a portion of the first material layer is between the second material layer and the dielectric layer. A material of the first material region is different from a material of the second material region.
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公开(公告)号：US20230337414A1
公开(公告)日：2023-10-19
申请号：US18300180
申请日：2023-04-13
发明人： Jungmin PARK , Hanjin LIM , Hyungsuk JUNG
IPC分类号： H10B12/00
CPC分类号： H10B12/315
摘要： A semiconductor device includes a cell capacitor disposed on a substrate and that and includes a first electrode, a dielectric layer structure, and a second electrode. The dielectric layer structure includes a first dielectric layer disposed on the first electrode and that includes a ferroelectric material, a second dielectric layer disposed on the first dielectric layer and that includes an antiferroelectric material, and dielectric particles dispersed in at least one of the first dielectric layer or the second dielectric layer and that include a paraelectric material.
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公开(公告)号：US20240072106A1
公开(公告)日：2024-02-29
申请号：US18238028
申请日：2023-08-25
发明人： Jungmin PARK , Hanjin LIM , Hyungsuk JUNG
摘要： An integrated circuit device may include a transistor on a substrate, and a capacitor structure electrically connected to the transistor. The capacitor structure may include a first electrode, a dielectric layer structure on the first electrode, and a second electrode on the dielectric layer structure. The dielectric layer structure may include a plurality of first dielectric layers and a plurality of second dielectric layers which are alternately stacked. Each of the plurality of first dielectric layers may include an anti-ferroelectric material, and each of the plurality of second dielectric layers includes Hf1-xZrxO2 in which 0
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公开(公告)号：US20230380141A1
公开(公告)日：2023-11-23
申请号：US18169721
申请日：2023-02-15
发明人： Jungmin PARK , Hanjin LIM , Hyungsuk JUNG
IPC分类号： H10B12/00
CPC分类号： H10B12/315 , H10B12/033
摘要： A semiconductor device includes an upper electrode, a lower electrode, a dielectric layer between the upper electrode and the lower electrode, and a low-bandgap interfacial layer including at least one of a first low-bandgap interfacial layer between the dielectric layer and the upper electrode and a second low-bandgap interfacial layer between the dielectric layer and the lower electrode, wherein each of the first low-bandgap interfacial layer and the second low-bandgap interfacial layer includes a metal oxide having a bandgap energy of more than about 2.5 eV and less than or equal to about 3.5 eV.
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公开(公告)号：US20140183434A1
公开(公告)日：2014-07-03
申请号：US14064826
申请日：2013-10-28
发明人： Hanjin LIM , Wonseok YOO , Insang JEON , Seokwoo NAM , Kongsoo LEE , Jaejong HAN
IPC分类号： H01L27/24 , H01L29/78 , H01L29/872
CPC分类号： H01L27/2463 , H01L21/2652 , H01L21/28518 , H01L21/76814 , H01L21/76834 , H01L23/485 , H01L27/2409 , H01L29/0847 , H01L29/167 , H01L29/401 , H01L29/456 , H01L29/8613 , H01L45/06 , H01L45/1233 , H01L45/1273 , H01L2924/0002 , H01L2924/00
摘要： Semiconductor devices, and methods of fabricating the same, include a metal-containing layer on a semiconductor layer, and a barrier-lowering portion between the metal-containing layer and the semiconductor layer. The barrier-lowering portion lowers a Schottky barrier height between the metal-containing layer and the semiconductor layer below a Schottky barrier height between a metal silicide layer and the semiconductor layer.
摘要翻译： 半导体器件及其制造方法包括半导体层上的含金属层和金属含有层与半导体层之间的阻挡降低部。 阻挡降低部将金属含有层与半导体层之间的肖特基势垒高度降低到金属硅化物层与半导体层之间的肖特基势垒高度以下。
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公开(公告)号：US20240315045A1
公开(公告)日：2024-09-19
申请号：US18495038
申请日：2023-10-26
发明人： Jungmin PARK , Ji-Sung KIM , Hanjin LIM , Hyungsuk JUNG
IPC分类号： H10B53/30
CPC分类号： H10B53/30
摘要： A semiconductor device may include a substrate including a first impurity region and a second impurity region; a first word line in a region of the substrate with the first impurity region on one side of the first word line and the second impurity region on an other side of the first word line; a bit line connected to the first impurity region; a first conductive pattern connected to the second impurity region; a first partial electrode and a second partial electrode on the first conductive pattern; a first dielectric layer in contact with an upper surface of the first partial electrode and an upper surface of the second partial electrode; and a common electrode on the first dielectric layer. An area of the upper surface of the first partial electrode may be different from an area of the upper surface of the second partial electrode.
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8.发明公开公开(公告)号：US20240096931A1
公开(公告)日：2024-03-21
申请号：US18462394
申请日：2023-09-06
发明人： Jungmin PARK , Hanjin LIM , Hyungsuk JUNG
IPC分类号： H10B12/00
CPC分类号： H01L28/91 , H01L28/75 , H10B12/0335 , H10B12/315
摘要： A capacitor structure includes a lower electrode structure disposed on a substrate, including an oxide of a first metal having 4 valence electrons, and being doped with a second metal having 3, 5, 6, or 7 valence electrons, a dielectric pattern disposed on a sidewall of the lower electrode structure, and an upper electrode disposed on a sidewall of the dielectric pattern.
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公开(公告)号：US20230413522A1
公开(公告)日：2023-12-21
申请号：US18151805
申请日：2023-01-09
发明人： Jungmin PARK , Hanjin LIM , Hyungsuk JUNG
IPC分类号： H10B12/00
CPC分类号： H10B12/315 , H10B12/03
摘要： A semiconductor device including a substrate, a plurality of lower electrodes on the substrate, a dielectric layer stack covering the lower electrodes, and an upper electrode covering the dielectric layer stack may be provided. The dielectric layer stack may include a first dielectric layer on the plurality of lower electrodes, the first dielectric layer including a material having anti-ferroelectricity or paraelectricity, and a second dielectric layer between the first dielectric layer and the upper electrode, the second dielectric layer including a material having ferroelectricity. The upper electrode may include a first upper electrode layer including an N-type impurity.
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公开(公告)号：US20230387191A1
公开(公告)日：2023-11-30
申请号：US18095561
申请日：2023-01-11
发明人： Intak JEON , Hanjin LIM , Hyungsuk JUNG
IPC分类号： H10B12/00
CPC分类号： H01L28/75 , H10B12/482 , H10B12/488 , H10B12/315
摘要： A semiconductor device includes a substrate, a plurality of lower electrodes disposed on the substrate, at least one support layer in contact with the plurality of lower electrodes and extending in a direction, parallel to an upper surface of the substrate, an upper electrode disposed on the plurality of lower electrodes and the at least one support layer, a dielectric layer between the plurality of lower electrodes and the upper electrode and between the at least one support layer and the upper electrode, and a blocking layer disposed between the at least one support layer and the dielectric layer, and including a material having a bandgap energy greater than a bandgap energy of a material of the at least one support layer. The dielectric layer is in contact with the plurality of lower electrodes and is spaced apart from the at least one support layer by the blocking layer.
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