公开(公告)号：US10660208B2

公开(公告)日：2020-05-19

申请号：US15209244

申请日：2016-07-13

Applicant: General Electric Company

Inventor： Christopher James Kapusta ,  Kaustubh Ravindra Nadarkar

IPC: H05K3/40 ,  H05K3/32 ,  H05K1/18 ,  H01M6/40 ,  H01M10/0585 ,  H01M10/0562 ,  H01L23/58 ,  H01L23/538 ,  H01L23/31 ,  H01L23/00 ,  H01M10/04 ,  H01M2/20 ,  H01M10/42 ,  H01L21/48 ,  H01L21/56 ,  H01L23/66 ,  H05K1/02 ,  H05K1/11 ,  H01M10/0587 ,  H01L25/16 ,  H01M10/052

Abstract: A system and method for providing a packaged electronics module having a dry film battery incorporated therein is disclosed. The packaged electronics module includes a first dielectric layer, at least one electronic component attached to or embedded in the first dielectric layer, a dry film battery formed on the first dielectric layer, and metal interconnects mechanically and electrically coupled to the at least one electronic component and the dry film battery to form electrical interconnections thereto. Electronic components in the form of a MEMS type sensor, semiconductor device and communications device may be included in the module along with the battery to provide a self-powered module capable of communicating with other like packaged electronics modules.

公开(公告)号：US20200066652A1

公开(公告)日：2020-02-27

申请号：US16667376

申请日：2019-10-29

Applicant: General Electric Company

Inventor： Christopher James Kapusta ,  Raymond Albert Fillion ,  Risto Ilkka Sakari Tuominen ,  Kaustubh Ravindra Nagarkar

IPC: H01L23/552 ,  H01L21/52 ,  H01L21/56 ,  H01L21/48 ,  H01L23/31 ,  H01L23/00

Abstract: An electronics package includes a support substrate, an electrical component having a first surface coupled to a first surface of the support substrate, and an insulating structure coupled to the first surface of the support substrate and sidewalls of the electrical component. The insulating structure has a sloped outer surface. A conductive layer encapsulates the electrical component and the sloped outer surface of the insulating structure. A first wiring layer is formed on a second surface of the support substrate. The first wiring layer is coupled to the conductive layer through at least one via in the support substrate.

公开(公告)号：US10333493B2

公开(公告)日：2019-06-25

申请号：US15246671

申请日：2016-08-25

Applicant: General Electric Company

Inventor： Kaustubh Ravindra Nagarkar ,  Yongjae Lee ,  Christopher James Kapusta

IPC: H03H9/64 ,  H03H9/72 ,  H03H9/54 ,  H03H3/02 ,  H03H9/05 ,  H03H9/10

Abstract: A filter package and method of manufacturing thereof is disclosed. The filter device package includes a first dielectric layer having an acoustic wave filter device attached thereto, the acoustic wave filter device comprising an active area and I/O pads. The filter device package also includes an adhesive positioned between the first dielectric layer and the acoustic wave filter device to secure the layer to the device, vias formed through the first dielectric layer and the adhesive to the I/O pads of the acoustic wave filter device, and metal interconnects formed in the vias and mechanically and electrically coupled to the I/O pads of the acoustic wave filter device to form electrical interconnections thereto, wherein an air cavity is formed in the adhesive between the acoustic wave filter device and the first dielectric layer, in a location adjacent the active area of the acoustic wave filter device.

公开(公告)号：US20190148279A1

公开(公告)日：2019-05-16

申请号：US16229049

申请日：2018-12-21

Applicant: General Electric Company

Inventor： Christopher James Kapusta ,  Kaustubh Ravindra Nagarkar ,  Arun Virupaksha Gowda ,  James Wilson Rose

IPC: H01L23/498 ,  H01L23/00 ,  H01L21/48

Abstract: An electronics package includes an interconnect assembly comprising a first insulating substrate, a first wiring layer formed on a lower surface of the first insulating substrate, and at least one through hole extending through the first insulating substrate and the first wiring layer. The electronics package also includes an electrical component assembly comprising an electrical component having an active surface coupled to an upper surface of the first insulating substrate opposite the lower surface. The active surface of the electrical comprises at least one metallic contact pad. At least one conductive stud is coupled to the at least one metallic contact pad and is positioned within the at least one through hole. A conductive plug contacts the first wiring layer and extends into the at least one through hole to at least partially surround the at least one conductive stud.

公开(公告)号：US20190115658A1

公开(公告)日：2019-04-18

申请号：US15782991

申请日：2017-10-13

Applicant: General Electric Company

Inventor： Joseph Alfred Iannotti ,  Christopher James Kapusta

IPC: H01Q3/26

Abstract: A beam former module includes a package base and an interconnect structure formed within the package base. The beam former module also includes a first true time delay (TTD) module attached to the package base. The first TTD module includes a plurality of switching elements configured to define a signal transmission path between a signal input and a signal output of the first TTD module by selectively activating a plurality of time delay lines. The signal input and the signal output of the first TTD module are electrically coupled to the interconnect structure. In some embodiments, the interconnect structure includes at least one TTD meander line and at least one of the time delay lines of the first TTD module is electrically coupled to the at least one TTD meander line.

公开(公告)号：US20190103331A1

公开(公告)日：2019-04-04

申请号：US16205451

申请日：2018-11-30

Applicant: General Electric Company

Inventor： Christopher James Kapusta ,  Marco Francesco Aimi

IPC: H01L23/10 ,  B81B7/00

Abstract: A non-magnetic hermetic package includes walls that surround an open cavity, with a generally planar non-magnetic and metallic seal ring disposed in a continuous loop around upper edges of the walls; a sensitive component that is bonded within the cavity; and a non-magnetic lid that is sealed to the seal ring to close the cavity by a metallic seal.

公开(公告)号：US20190043733A1

公开(公告)日：2019-02-07

申请号：US15668468

申请日：2017-08-03

Applicant: General Electric Company

Inventor： Christopher James Kapusta ,  Raymond Albert Fillion ,  Risto Ilkka Sakari Tuominen ,  Kaustubh Ravindra Nagarkar

IPC: H01L21/48 ,  H01L21/56 ,  H01L21/52 ,  H01L23/28 ,  H01L23/31

Abstract: An electronics package includes an insulating substrate, an electrical component having a back surface coupled to a first surface of the insulating substrate, and an insulating structure surrounding at least a portion of a perimeter of the electrical component. A first wiring layer extends from the first surface of the insulating substrate and over a sloped side surface of the insulating structure to electrically couple with at least one contact pad on an active surface of the electrical component. A second wiring layer is formed on a second surface of the insulating substrate and extends through at least one via therein to electrically couple with the first wiring layer.

公开(公告)号：US09814419B2

公开(公告)日：2017-11-14

申请号：US15092655

申请日：2016-04-07

Applicant: General Electric Company

Inventor： Jason Harris Karp ,  Christopher James Kapusta ,  Paul Jeffrey Gillespie ,  Christopher Fred Keimel ,  Jeffrey Michael Ashe ,  James Enrico Sabatini

IPC: A61B5/1455 ,  A61B5/00 ,  A61B5/029 ,  A61B5/08 ,  H01L25/075 ,  H05K1/18 ,  H01L33/62

CPC classification number: A61B5/14552 ,  A61B5/0002 ,  A61B5/029 ,  A61B5/0816 ,  A61B5/6826 ,  A61B5/742 ,  A61B2562/0238 ,  A61B2562/046 ,  A61B2562/12 ,  A61B2562/164 ,  A61B2562/222 ,  A61B2562/227 ,  H01L25/0753 ,  H01L33/62 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2924/181 ,  H05K1/189 ,  H05K2201/10106 ,  H05K2201/10151 ,  Y10T29/49139 ,  H01L2924/00014 ,  H01L2924/00012

Abstract: An array of emitters includes a device substrate having first and second sides, a thermally and electrically conductive layer disposed on the first side of the device substrate, and an interconnect layer disposed on a first plurality of portions of the second side of the device substrate. The array of the emitters further includes a plurality of emitters disposed in a second plurality of portions of the device substrate, where the plurality of emitters is electrically coupled to the thermally and electrically conductive layer. Also, the array of the emitters includes a plurality of wirebond contacts configured to electrically couple a portion of the interconnect layer to a corresponding emitter of the plurality of emitters, and a plurality of encapsulations, where one or more encapsulations of the plurality of encapsulations are disposed on at least a portion of a corresponding wirebond contact of the plurality of wirebond contacts.

公开(公告)号：US09806390B2

公开(公告)日：2017-10-31

申请号：US15429227

申请日：2017-02-10

Applicant: General Electric Company

Inventor： Yongjae Lee ,  Joseph Alfred Iannotti ,  Christopher Fred Keimel ,  Christopher James Kapusta

IPC: H01P1/15 ,  H01H57/00 ,  H01L21/48 ,  H01L21/52 ,  H01L21/54 ,  H01L21/56 ,  H01H59/00 ,  H01H61/01 ,  H01H55/00 ,  H01H61/00

CPC classification number: H01P1/15 ,  H01H55/00 ,  H01H57/00 ,  H01H59/0009 ,  H01H61/01 ,  H01H2057/006 ,  H01H2061/006 ,  H01L21/4853 ,  H01L21/52 ,  H01L21/54 ,  H01L21/56 ,  H01L2224/16225 ,  H01L2924/16195 ,  H01P1/127 ,  H01P3/084

Abstract: A radio frequency (RF) die package includes a switch assembly comprising an RF transmission line and a plurality of conductive mounting pads formed on a first substrate. A switching mechanism selectively couples a first portion of the RF transmission line to a second portion of the RF transmission line. An inverted ground plane assembly is coupled to the plurality of conductive mounting pads such that an electromagnetic field generated between the RF transmission line and the inverted ground plane assembly does not permeate the first substrate in a region of the switch assembly proximate the switching mechanism.

公开(公告)号：US20170191167A1

公开(公告)日：2017-07-06

申请号：US15465172

申请日：2017-03-21

Applicant: General Electric Company

Inventor： Christopher James Kapusta ,  Marco Francesco Aimi

IPC: C23C28/02 ,  C23F1/00 ,  B23K1/00 ,  B23K35/02 ,  B23K35/30 ,  B81C1/00 ,  C23C14/02 ,  C23C14/16 ,  C23C14/34 ,  C23C14/58 ,  C25D3/50 ,  C25D7/12 ,  C23F4/00 ,  B23K35/26

CPC classification number: C23C28/023 ,  B23K1/0016 ,  B23K35/0222 ,  B23K35/262 ,  B23K35/3013 ,  B23K2101/40 ,  B81C1/00269 ,  B81C2201/013 ,  B81C2203/0109 ,  B81C2203/019 ,  B81C2203/037 ,  C23C14/025 ,  C23C14/165 ,  C23C14/3414 ,  C23C14/58 ,  C23C28/021 ,  C23F1/00 ,  C23F4/00 ,  C25D3/50 ,  C25D7/123

Abstract: A non-magnetic lid for sealing a hermetic package. The lid includes a molybdenum substrate having a sputtered adhesion layer and a copper seed layer. The lid also includes a plated palladium solder base layer, and has a gold/tin solder preform attached to a sealing surface of the lid.