公开(公告)号：US20200035525A1

公开(公告)日：2020-01-30

申请号：US16591354

申请日：2019-10-02

Applicant: Applied Materials, Inc.

Inventor： Xinyu BAO ,  Hua CHUNG ,  Schubert S. CHU

IPC: H01L21/67 ,  H01J37/32 ,  B08B7/00 ,  C30B25/04 ,  C30B25/18 ,  C30B29/06 ,  H01L21/02 ,  H01L21/285 ,  H01L21/3065 ,  H01L29/66

Abstract: Implementations of the present disclosure generally relate to methods and apparatuses for epitaxial deposition on substrate surfaces. More particularly, implementations of the present disclosure generally relate to an integrated system for processing N-type metal-oxide semiconductor (NMOS) devices. In one implementation, a cluster tool for processing a substrate is provided. The cluster tool includes a pre-clean chamber, an etch chamber, one or more pass through chambers, one or more outgassing chambers, a first transfer chamber, a second transfer chamber, and one or more process chambers. The pre-clean chamber and the etch chamber are coupled to a first transfer chamber. The one or more pass through chambers are coupled to and disposed between the first transfer chamber and the second transfer chamber. The one or more outgassing chambers are coupled to the second transfer chamber. The one or more process chambers are coupled to the second transfer chamber.

公开(公告)号：US20180286961A1

公开(公告)日：2018-10-04

申请号：US15896983

申请日：2018-02-14

Applicant: Applied Materials, Inc.

Inventor： Xinyu BAO ,  Zhiyuan YE ,  Flora Fong-Song CHANG ,  Abhishek DUBE ,  Xuebin LI ,  Errol Antonio C. SANCHEZ ,  Hua CHUNG ,  Schubert S. CHU

IPC: H01L29/66 ,  H01L29/78 ,  H01L29/06 ,  H01L29/167 ,  H01L29/08

CPC classification number: H01L29/6659 ,  H01L21/02532 ,  H01L21/02576 ,  H01L21/0262 ,  H01L21/02639 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/167 ,  H01L29/41775 ,  H01L29/66628 ,  H01L29/66795 ,  H01L29/7834 ,  H01L29/7851

Abstract: A device comprising Si:As source and drain extensions and Si:As or Si:P source and drain features formed using selective epitaxial growth and a method of forming the same is provided. The epitaxial layers used for the source and drain extensions and the source and drain features herein are deposited by simultaneous film formation and film etching, wherein the deposited material on the monocrystalline layer is etched at a slower rate than deposition material deposited on non-monocrystalline location of a substrate. As a result, an epitaxial layer is deposited on the monocrystalline surfaces, and a layer is not deposited on non-monocrystalline surfaces of the same base material, such as silicon.

公开(公告)号：US20180211881A1

公开(公告)日：2018-07-26

申请号：US15811188

申请日：2017-11-13

Applicant: Applied Materials, Inc.

Inventor： Ying ZHANG ,  Schubert S. CHU ,  Xinyu BAO ,  Regina Germanie FREED ,  Hua CHUNG

IPC: H01L21/8234 ,  H01L29/417 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L21/823431 ,  H01L29/41791 ,  H01L29/66795 ,  H01L29/7831 ,  H01L29/7848 ,  H01L29/7851

Abstract: Methods for forming semiconductor devices, such as FinFETs, are provided. In one embodiment, a method for forming a FinFET device includes removing a portion of each fin of a plurality of fins, and a remaining portion of each fin is recessed from a dielectric surface. The method further includes forming a feature on the remaining portion of each fin, filling gaps formed between adjacent features with a dielectric material, removing the features, and forming a fill material on the remaining portion of each fin. Because the shape of the features is controlled, the shape of the fill material can be controlled.

公开(公告)号：US20180166570A1

公开(公告)日：2018-06-14

申请号：US15839024

申请日：2017-12-12

Applicant: Applied Materials, Inc.

Inventor： Sheng-Chin KUNG ,  Hua CHUNG

IPC: H01L29/78 ,  H01L29/66 ,  H01L21/02 ,  H01L29/161 ,  H01L29/10

CPC classification number: H01L29/7848 ,  H01L21/0243 ,  H01L21/02532 ,  H01L21/0262 ,  H01L29/1054 ,  H01L29/161 ,  H01L29/66 ,  H01L29/66795 ,  H01L29/785

Abstract: The present disclosure generally relates to devices having conformal semiconductor cladding materials, and methods of forming the same. The cladding material is a silicon germanium epitaxial material. The cladding material is capable of being deposited to a thickness which is less than cladding materials formed by conventional deposition/etch techniques.

公开(公告)号：US20180082836A1

公开(公告)日：2018-03-22

申请号：US15417496

申请日：2017-01-27

Applicant: Applied Materials, Inc.

Inventor： Chun YAN ,  Xinyu BAO ,  Melitta Manyin HON ,  Hua CHUNG ,  Schubert S. CHU

IPC: H01L21/02 ,  H01L29/66

CPC classification number: H01L21/02057 ,  H01L29/66636 ,  H01L29/66795

Abstract: Implementations described herein generally provide a method of processing a substrate. Specifically, the methods described are used for cleaning and etching source/drain regions on a silicon substrate in preparation for precise Group IV source/drain growth in semiconductor devices. Benefits of this disclosure include precise fin size control in devices, such as 10 nm FinFET devices, and increased overall device yield. The method of integrated clean and recess includes establishing a low pressure processing environment in the processing volume, and maintaining the low pressure processing environment while flowing a first gas over a substrate in a processing volume, depositing a salt on the substrate, heating the processing volume to greater than 90° C., purging the processing volume with a second inert gas, and recessing a source/drain region disposed on the substrate.

公开(公告)号：US20180082835A1

公开(公告)日：2018-03-22

申请号：US15417466

申请日：2017-01-27

Applicant: Applied Materials, Inc.

Inventor： Chun YAN ,  Xinyu BAO ,  Hua CHUNG ,  Schubert S. CHU

IPC: H01L21/02 ,  H01L21/3065 ,  H01L21/324 ,  H01L21/67 ,  B08B7/00

CPC classification number: H01L21/02046 ,  B08B7/0035 ,  B08B7/0057 ,  C23C16/4401 ,  C23C16/56 ,  H01L21/02532 ,  H01L21/02576 ,  H01L21/02664 ,  H01L21/2686 ,  H01L21/3065 ,  H01L21/324 ,  H01L21/67017 ,  H01L21/67034 ,  H01L21/67069 ,  H01L21/67115

Abstract: Implementations disclosed herein relate to methods for controlling substrate outgassing of hazardous gasses after an epitaxial process. In one implementation, the method includes providing a substrate comprising an epitaxial layer into a transfer chamber, wherein the transfer chamber has an ultraviolet (UV) lamp module disposed adjacent to a top ceiling of the transfer chamber, flowing an oxygen-containing gas into the transfer chamber through a gas line of the transfer chamber, flowing a non-reactive gas into the transfer chamber through the gas line of the transfer chamber, activating the UV lamp module to oxidize residues or species on a surface of the substrate to form an outgassing barrier layer on the surface of the substrate, ceasing the flow of the oxygen-containing gas and the nitrogen-containing gas into the transfer chamber, pumping the transfer chamber, and deactivating the UV lamp module.

公开(公告)号：US20180076031A1

公开(公告)日：2018-03-15

申请号：US15418190

申请日：2017-01-27

Applicant: Applied Materials, Inc.

Inventor： Chun YAN ,  Xinyu BAO ,  Hua CHUNG ,  Schubert S. CHU

IPC: H01L21/02 ,  H01L29/78 ,  H01L29/08

CPC classification number: H01L21/02664 ,  C23C14/021 ,  C23C14/022 ,  C23C14/5826 ,  C23C14/5873 ,  C23C16/0245 ,  C23C16/24 ,  C23C16/56 ,  H01L21/02236 ,  H01L21/02252 ,  H01L21/02293 ,  H01L21/02315 ,  H01L21/0234 ,  H01L21/0262 ,  H01L21/02634 ,  H01L21/02661 ,  H01L21/2018 ,  H01L21/2033 ,  H01L21/76855 ,  H01L29/0847 ,  H01L29/66795 ,  H01L29/785

Abstract: Implementations disclosed herein relate to methods for controlling substrate outgassing. In one implementation, the method includes removing oxides from an exposed surface of a substrate in an inductively coupled plasma chamber, forming an epitaxial layer on the exposed surface of the substrate in an epitaxial deposition chamber, and performing an outgassing control of the substrate by subjecting the substrate to a first plasma formed from a first etch precursor in the inductively coupled plasma chamber at a first chamber pressure, wherein the first etch precursor comprises a hydrogen-containing precursor, a chlorine-containing precursor, and an inert gas, and subjecting the substrate to a second plasma formed from a second etch precursor in the inductively coupled plasma chamber at a second chamber pressure that is higher than the first chamber pressure, wherein the second etch precursor comprises a hydrogen-containing precursor and an inert gas.

公开(公告)号：US20170148636A1

公开(公告)日：2017-05-25

申请号：US15345549

申请日：2016-11-08

Applicant: Applied Materials, Inc.

Inventor： Wei LIU ,  Hua CHUNG ,  Xuebin LI ,  Yuxiang LU

IPC: H01L21/3065 ,  H01L29/66 ,  H01J37/32 ,  H01L21/308

CPC classification number: H01L21/3065 ,  H01J37/32009 ,  H01J37/3244 ,  H01J2237/334 ,  H01L21/02115 ,  H01L21/02236 ,  H01L21/02252 ,  H01L21/02274 ,  H01L21/30655 ,  H01L21/3081 ,  H01L21/3083 ,  H01L29/66795

Abstract: Methods for forming semiconductor devices, such as FinFET devices, are provided. An epitaxial film is formed over a semiconductor fin, and the epitaxial film includes a top surface having two facets and a bottom surface including two facets. A cap layer is deposited on the top surface, and portions of the epitaxial film in a lateral direction are removed by an isotropic plasma etch process. The isotropic plasma etch process may be performed at a pressure ranging from about 5 mTorr to about 200 mTorr in order to maximize the amount of radicals while minimizing the amount of ions in the plasma. Having a smaller lateral dimension prevents the epitaxial film from merging with an adjacent epitaxial film and creates a gap between the epitaxial film and the adjacent epitaxial film.

公开(公告)号：US20170092494A1

公开(公告)日：2017-03-30

申请号：US15377629

申请日：2016-12-13

Applicant: Applied Materials, Inc.

Inventor： Ying ZHANG ,  Uday MITRA ,  Praburam GOPALRAJA ,  Srinivas D. NEMANI ,  Hua CHUNG

IPC: H01L21/033 ,  H01L21/768 ,  H01L21/311

CPC classification number: H01L21/0332 ,  H01L21/0337 ,  H01L21/31116 ,  H01L21/31144 ,  H01L21/76816

Abstract: The present disclosure provides forming nanostructures with precision dimension control and minimum lithographic related errors for features with dimension under 14 nanometers and beyond. A self-aligned multiple spacer patterning (SAMSP) process is provided herein and the process utilizes minimum lithographic exposure process, but rather multiple deposition/etching process to incrementally reduce feature sizes formed in the mask along the manufacturing process, until a desired extreme small dimension nanostructures are formed in a mask layer.

公开(公告)号：US20160126093A1

公开(公告)日：2016-05-05

申请号：US14870792

申请日：2015-09-30

Applicant: Applied Materials, Inc.

Inventor： Abhishek DUBE ,  Hua CHUNG ,  Jenn-Yue WANG ,  Xuebin LI ,  Yi-Chiau HUANG ,  Schubert S. CHU

IPC: H01L21/02 ,  H01L29/78

CPC classification number: H01L21/823431 ,  H01L21/02381 ,  H01L21/0243 ,  H01L21/0245 ,  H01L21/02513 ,  H01L21/02516 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/3065 ,  H01L29/7848 ,  H01L29/7851

Abstract: Implementations of the present disclosure generally relate to methods for epitaxial growth of a silicon material on an epitaxial film. In one implementation, the method includes forming an epitaxial film over a semiconductor fin, wherein the epitaxial film includes a top surface having a first facet and a second facet, and forming an epitaxial layer on at least the top surface of the epitaxial film by alternatingly exposing the top surface to a first precursor gas comprising one or more silanes and a second precursor gas comprising one or more chlorinated silanes at a temperature of about 375° C. to about 450° C. and a chamber pressure of about 5 Torr to about 20 Torr.

Abstract translation: 本公开的实施方式一般涉及在外延膜上硅材料外延生长的方法。 在一个实施方案中，该方法包括在半导体鳍片上形成外延膜，其中外延膜包括具有第一面和第二面的顶表面，并且通过交替地在至少外延膜的顶表面上形成外延层 将顶表面暴露于包含一种或多种硅烷的第一前体气体和包含一种或多种氯化硅烷的第二前体气体，其温度为约375℃至约450℃，室压力为约5托至约 20乇