公开(公告)号：US20160300721A1

公开(公告)日：2016-10-13

申请号：US15182995

申请日：2016-06-15

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： Hong He ,  Junli Wang ,  Yongan Xu ,  Yunpeng Yin

IPC分类号： H01L21/28 ,  H01L29/66 ,  H01L29/08 ,  H01L29/49 ,  H01L29/78 ,  H01L29/06

CPC分类号： H01L29/66795 ,  H01L21/02115 ,  H01L21/02274 ,  H01L21/28088 ,  H01L21/31122 ,  H01L21/76224 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/401 ,  H01L29/42376 ,  H01L29/4966 ,  H01L29/66545 ,  H01L29/785

摘要： A method of forming a semiconductor device that includes forming a sacrificial gate structure on a channel portion of a fin structure, wherein the angle at the intersection of the sidewall of the sacrificial gate structure and an upper surface of the channel portion of the fin structure is obtuse. Epitaxial source and drain region structures are formed on a source region portion and a drain region portion of the fin structure. At least one dielectric material is formed on the sidewall of the sacrificial gate structure. The sacrificial gate structure may be removed to provide an opening to the channel portion of the fin structure. A function gate structure is formed in the opening. At least one angle defined by the intersection of a sidewall of the functional gate structure and an upper surface of the channel portion of the fin structure is obtuse.

公开(公告)号：US09391155B2

公开(公告)日：2016-07-12

申请号：US14953908

申请日：2015-11-30

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： Hong He ,  Chiahsun Tseng ,  Chun-Chen Yeh ,  Yunpeng Yin

IPC分类号： H01L29/78 ,  H01L29/49 ,  H01L29/66 ,  H01L29/08 ,  H01L29/423

CPC分类号： H01L29/4966 ,  H01L21/0337 ,  H01L21/823431 ,  H01L29/0847 ,  H01L29/42364 ,  H01L29/42372 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/785 ,  H01L29/7851

摘要： In one embodiment, a semiconductor device is provided that includes a gate structure present on a channel portion of a fin structure. The gate structure includes a dielectric spacer contacting a sidewall of a gate dielectric and a gate conductor. Epitaxial source and drain regions are present on opposing sidewalls of the fin structure, wherein surfaces of the epitaxial source region and the epitaxial drain region that is in contact with the sidewalls of the fin structure are aligned with an outside surface of the dielectric spacer. In some embodiments, the dielectric spacer, the gate dielectric, and the gate conductor of the semiconductor device are formed using a single photoresist mask replacement gate sequence.

公开(公告)号：US09379218B2

公开(公告)日：2016-06-28

申请号：US14584790

申请日：2014-12-29

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： Kangguo Cheng ,  Bruce B. Doris ,  Hong He ,  Ali Khakifirooz ,  Yunpeng Yin

IPC分类号： H01L29/66 ,  H01L21/225 ,  H01L29/78

CPC分类号： H01L29/66795 ,  H01L21/02532 ,  H01L21/2254 ,  H01L21/30604 ,  H01L21/324 ,  H01L21/823431 ,  H01L29/0649 ,  H01L29/66545 ,  H01L29/785 ,  H01L29/7851

摘要： A method of forming a semiconductor device that includes forming a silicon including fin structure and forming a germanium including layer on the silicon including fin structure. Germanium is then diffused from the germanium including layer into the silicon including fin structure to convert the silicon including fin structure to silicon germanium including fin structure.

摘要翻译： 一种形成半导体器件的方法，包括在包括鳍结构的硅上形成包括鳍结构的硅并形成含锗层。 然后，锗从含锗层扩散到包括鳍结构的硅中，以将包括鳍结构的硅转化为包括鳍结构的硅锗。

公开(公告)号：US20150287614A1

公开(公告)日：2015-10-08

申请号：US14581135

申请日：2014-12-23

申请人： International Business Machines Corporation

发明人： Kangguo Cheng ,  Hong He ,  Ali Khakifirooz ,  Chiahsun Tseng ,  Chun-chen Yeh ,  Yunpeng Yin

IPC分类号： H01L21/321 ,  H01L27/092 ,  H01L21/22 ,  H01L21/8238 ,  H01L29/165

CPC分类号： H01L27/0924 ,  B82Y40/00 ,  H01L21/02236 ,  H01L21/30604 ,  H01L21/823807 ,  H01L21/823821 ,  H01L29/0673 ,  H01L29/1054 ,  H01L29/66545 ,  H01L29/66795

摘要： A method of fabricating a semiconductor device includes forming at least one semiconductor fin on a semiconductor substrate. A cladding layer is epitaxially grown on a portion of the at least one semiconductor fin. The cladding layer is oxidized such that r such that ions are condensed therefrom and are diffused into the at least one semiconductor fin while the cladding layer is converted to an oxide layer. The oxide layer is removed to expose the at least one semiconductor fin having a diffused fin portion that enhances electron hole mobility therethrough.

摘要翻译： 制造半导体器件的方法包括在半导体衬底上形成至少一个半导体鳍片。 在所述至少一个半导体鳍片的一部分上外延生长覆层。 包覆层被氧化成使得离子从其中冷凝并扩散到至少一个半导体翅片中，同时将包层转化为氧化物层。 去除氧化物层以暴露具有增强电子空穴迁移率的扩散翅片部分的至少一个半导体鳍片。

公开(公告)号：US09105641B2

公开(公告)日：2015-08-11

申请号：US14486493

申请日：2014-09-15

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： Shyng-Tsong Chen ,  Samuel S. Choi ,  Steven J. Holmes ,  David V. Horak ,  Charles W. Koburger, III ,  Wai-Kin Li ,  Christopher J. Penny ,  Shom Ponoth ,  Chih-Chao Yang ,  Yunpeng Yin

IPC分类号： H01L23/12 ,  H01L21/4763 ,  H01L23/532 ,  H01L23/48 ,  H01L21/768 ,  H01L23/522 ,  H01L23/528

CPC分类号： H01L23/53295 ,  H01L21/76807 ,  H01L21/76813 ,  H01L21/76831 ,  H01L21/76844 ,  H01L23/481 ,  H01L23/5226 ,  H01L23/528 ,  H01L2924/0002 ,  H01L2924/00

摘要： The profile of a via can be controlled by forming a profile control liner within each via opening that is formed into a dielectric material prior to forming a line opening within the dielectric material. The presence of the profile control liner within each via opening during the formation of the line opening prevents rounding of the corners of a dielectric material portion that is present beneath the line opening and adjacent the via opening.

摘要翻译： 可以通过在形成介电材料之前形成电介质材料的每个通孔开口内形成轮廓控制衬垫来控制通孔的轮廓，然后在电介质材料内形成线路开口。 在形成线路开口期间，每个通孔开口内的轮廓控制衬里的存在防止存在于线路开口下方并且邻近通孔开口的电介质材料部分的拐角的四舍五入。

公开(公告)号：US20150221547A1

公开(公告)日：2015-08-06

申请号：US14172263

申请日：2014-02-04

申请人： STMICROELECTRONIC, INC. ,  INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： John C. Arnold ,  Shyng-Tsong Chen ,  Yann Mignot ,  Muthumanickam Sankarapandian ,  Oscar van der Straten ,  Yunpeng Yin

IPC分类号： H01L21/768 ,  H01L21/311

CPC分类号： H01L21/31144 ,  H01L21/31116 ,  H01L21/76811

摘要： A stack of an interlevel dielectric (ILD) layer, a dielectric cap layer, and a metallic hard mask layer is formed on a substrate. The metallic hard mask layer can be patterned with a first pattern. A photoresist layer is formed over the metallic hard mask layer and is patterned with a second pattern. A combination of the first pattern and the second pattern is transferred into the ILD layer to form a dual damascene trench, which includes an undercut underneath the patterned dielectric cap layer. The metallic hard mask layer is removed and the dielectric cap layer is anisotropically etched to form faceted edges and removal of overhanging portions. A metallic material can be deposited into the dual damascene trench without formation of voids during a metal fill process.

摘要翻译： 在衬底上形成层间电介质（ILD）层，电介质覆盖层和金属硬掩模层的堆叠。 金属硬掩模层可以用第一图案图案化。 在金属硬掩模层上形成光致抗蚀剂层，并以第二图案形成图案。 将第一图案和第二图案的组合转移到ILD层中以形成双镶嵌沟槽，其包括在图案化电介质盖层下方的底切。 去除金属硬掩模层并且电介质盖层被各向异性地蚀刻以形成刻面边缘和去除突出部分。 金属材料可以在金属填充过程中沉积到双镶嵌槽中而不形成空隙。

公开(公告)号：US09059257B2

公开(公告)日：2015-06-16

申请号：US14041187

申请日：2013-09-30

申请人： International Business Machines Corporation

发明人： Juntao Li ,  Chih-Chao Yang ,  Yunpeng Yin

IPC分类号： H01L21/44 ,  H01L21/768 ,  H01L23/48

CPC分类号： H01L21/76829 ,  H01L21/76834 ,  H01L21/76849 ,  H01L21/76897 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method including forming a sacrificial metal cap on a metal line formed in a first dielectric layer; forming a second dielectric layer on the first dielectric layer; removing the sacrificial metal cap selective to the second dielectric layer and metal line to form a cap opening; forming a dielectric cap in the cap opening and on the metal line; forming an interconnect dielectric layer over the dielectric cap and the second dielectric layer; forming an interconnect opening in the interconnect dielectric layer; removing a portion of the dielectric cap exposed by the interconnect opening selective to the interconnect dielectric layer, the second dielectric layer, and the metal line; and forming an interconnect structure in the interconnect opening, the interconnect structure comprising a contact line above a via, the via having an upper via portion with angled sidewalls and a lower via portion with substantially vertical sidewalls.

摘要翻译： 一种方法，包括在形成在第一介电层中的金属线上形成牺牲金属帽; 在所述第一电介质层上形成第二电介质层; 去除对第二电介质层和金属线选择性的牺牲金属帽以形成帽开口; 在盖开口和金属线上形成电介质盖; 在所述电介质盖和所述第二电介质层上形成互连电介质层; 在所述互连电介质层中形成互连开口; 去除由所述互连开口暴露的对所述互连电介质层，所述第二电介质层和所述金属线选择性的部分; 并且在所述互连开口中形成互连结构，所述互连结构包括在通孔上方的接触线，所述通孔具有带有成角度侧壁的上通孔部分和具有基本垂直侧壁的下通孔部分。

公开(公告)号：US20150108572A1

公开(公告)日：2015-04-23

申请号：US14058341

申请日：2013-10-21

申请人： International Business Machines Corporation

发明人： Kangguo Cheng ,  Hong He ,  Chiahsun Tseng ,  Yunpeng Yin

IPC分类号： H01L27/12 ,  H01L21/8234

CPC分类号： H01L21/845 ,  H01L21/823431 ,  H01L21/823481 ,  H01L27/1211 ,  H01L29/66795 ,  H01L29/7831

摘要： A silicon germanium alloy layer is formed on a semiconductor material layer by epitaxy. An oxygen impermeable layer is formed on the silicon germanium alloy layer. The oxygen impermeable layer and the silicon germanium alloy layer are patterned to form stacks of a silicon germanium alloy fin and an oxygen impermeable cap. A shallow trench isolation structure is formed by deposition, planarization, and recessing or an oxygen permeable dielectric material. An oxygen impermeable spacer is formed around each stack of a silicon germanium alloy fin and an oxygen impermeable cap. A thermal oxidation process is performed to convert a lower portion of each silicon germanium alloy fin into a silicon germanium oxide. During the thermal oxidation process, germanium atoms diffuse into unoxidized portions of the silicon germanium alloy fins to increase the germanium concentration therein.

摘要翻译： 通过外延在半导体材料层上形成硅锗合金层。 在硅锗合金层上形成不透氧层。 对不透氧层和硅锗合金层进行图案化以形成硅锗合金翅片和不透氧盖的叠层。 通过沉积，平坦化和凹陷形成浅沟槽隔离结构或透氧介电材料。 在硅锗合金翅片和不透氧盖的每个堆叠周围形成不透氧隔离物。 进行热氧化处理以将每个硅锗合金翅片的下部转换成硅氧化锗。 在热氧化过程中，锗原子扩散到硅锗合金翅片的未氧化部分，以增加其中的锗浓度。

公开(公告)号：US08969189B2

公开(公告)日：2015-03-03

申请号：US14027315

申请日：2013-09-16

申请人： International Business Machines Corporation

发明人： Hong He ,  Chiahsun Tseng ,  Chun-chen Yeh ,  Yunpeng Yin

IPC分类号： H01L21/3205 ,  H01L21/4763 ,  H01L21/28

CPC分类号： H01L21/28132 ,  H01L21/76801 ,  H01L21/76832 ,  H01L21/76834 ,  H01L21/76897 ,  H01L29/401 ,  H01L29/41775 ,  H01L29/517 ,  H01L29/66545 ,  H01L29/78

摘要： After formation of a replacement gate structure, a template dielectric layer employed to pattern the replacement gate structure is removed. After deposition of a dielectric liner, a first dielectric material layer is deposited by an anisotropic deposition and an isotropic etchback. A second dielectric material layer is deposited and planarized employing the first dielectric material portion as a stopping structure. The first dielectric material portion is removed selective to the second dielectric material layer, and is replaced with gate cap dielectric material portion including at least one dielectric material different from the materials of the dielectric material layers. A contact via hole extending to a source/drain region is formed employing the gate cap dielectric material portion as an etch stop structure. A contact via structure is spaced from the replacement gate structure at least by remaining portions of the gate cap dielectric material portion.

摘要翻译： 在形成替代栅极结构之后，去除用于对置换栅极结构进行图案化的模板电介质层。 在沉积介电衬垫之后，通过各向异性沉积和各向同性回蚀沉积第一介电材料层。 使用第一介电材料部分作为停止结构沉积和平坦化第二电介质材料层。 第一电介质材料部分被选择性地移除到第二电介质材料层，并且被包括不同于介电材料层的材料的至少一种介电材料的栅极盖电介质材料部分代替。 使用栅极绝缘材料部分作为蚀刻停止结构形成延伸到源极/漏极区域的接触孔。 接触通孔结构至少通过栅极盖电介质材料部分的剩余部分与替代栅极结构间隔开。

公开(公告)号：US20150054121A1

公开(公告)日：2015-02-26

申请号：US14035313

申请日：2013-09-24

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： Hong He ,  Chiahsun Tseng ,  Chun-Chen Yeh ,  Yunpeng Yin

IPC分类号： H01L29/06

CPC分类号： H01L29/0649 ,  B82Y10/00 ,  B82Y40/00 ,  H01L29/0673 ,  H01L29/16 ,  H01L29/66439 ,  H01L29/66795 ,  H01L29/775 ,  H01L29/785

摘要： A method for semiconductor fabrication includes patterning one or more mandrels over a semiconductor substrate, the one or more mandrels having dielectric material formed therebetween. A semiconductor layer is formed over exposed portions of the one or more mandrels. A thermal oxidation is performed to diffuse elements from the semiconductor layer into an upper portion of the one or more mandrels and concurrently oxidize a lower portion of the one or more mandrels to form the one or more mandrels on the dielectric material.

摘要翻译： 一种用于半导体制造的方法包括在半导体衬底上图形化一个或多个心轴，所述一个或多个心轴在其间形成介电材料。 在一个或多个心轴的暴露部分上形成半导体层。 执行热氧化以将元件从半导体层扩散到一个或多个心轴的上部，并且同时氧化一个或多个心轴的下部以在电介质材料上形成一个或多个心轴。