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    Semiconductor Device and Method of Forming Bump Structure with Multi-Layer UBM Around Bump Formation Area
    21.
    发明申请
    Semiconductor Device and Method of Forming Bump Structure with Multi-Layer UBM Around Bump Formation Area 有权
    半透明半导体器件与多层UBM在凸起形成区域形成凸块结构的方法

    公开(公告)号:US20110127668A1

    公开(公告)日:2011-06-02

    申请号:US12628631

    申请日:2009-12-01

    申请人: Yaojian Lin ,  Jianmin Fang ,  Kang Chen

    发明人: Yaojian Lin ,  Jianmin Fang ,  Kang Chen

    IPC分类号: H01L23/498 ,  H01L21/60 ,  H01L21/768

    CPC分类号: H01L24/03 ,  H01L23/3121 ,  H01L23/3128 ,  H01L23/3185 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/5389 ,  H01L24/05 ,  H01L24/13 ,  H01L24/14 ,  H01L24/29 ,  H01L24/48 ,  H01L2224/0231 ,  H01L2224/0233 ,  H01L2224/0239 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05082 ,  H01L2224/05111 ,  H01L2224/05155 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/13022 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/1411 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/83805 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/10329 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15174 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2224/03 ,  H01L2924/00 ,  H01L2924/0665 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

    摘要: A semiconductor wafer has a first conductive layer formed over its active surface. A first insulating layer is formed over the substrate and first conductive layer. A second conductive layer is formed over the first conductive layer and first insulating layer. A UBM layer is formed around a bump formation area over the second conductive layer. The UBM layer can be two stacked metal layers or three stacked metal layers. The second conductive layer is exposed in the bump formation area. A second insulating layer is formed over the UBM layer and second conductive layer. A portion of the second insulating layer is removed over the bump formation area and a portion of the UBM layer. A bump is formed over the second conductive layer in the bump formation area. The bump contacts the UBM layer to seal a contact interface between the bump and second conductive layer.

    摘要翻译: 半导体晶片具有在其有效表面上形成的第一导电层。 第一绝缘层形成在衬底和第一导电层上。 在第一导电层和第一绝缘层上形成第二导电层。 在第二导电层上方的凸块形成区域周围形成UBM层。 UBM层可以是两个堆叠的金属层或三个堆叠的金属层。 第二导电层暴露在凸块形成区域中。 在UBM层和第二导电层上形成第二绝缘层。 第二绝缘层的一部分在凸块形成区域和UBM层的一部分上被去除。 在凸块形成区域中的第二导电层上形成凸块。 凸块接触UBM层以密封凸点和第二导电层之间的接触界面。

    Semiconductor device and method of embedding integrated passive devices into the package electrically interconnected using conductive pillars
    22.
    发明授权
    Semiconductor device and method of embedding integrated passive devices into the package electrically interconnected using conductive pillars 有权
    将集成无源器件嵌入到使用导电柱电互连的封装中的半导体器件和方法

    公开(公告)号:US07935570B2

    公开(公告)日:2011-05-03

    申请号:US12331698

    申请日:2008-12-10

    申请人: Yaojian Lin ,  Jianmin Fang ,  Kang Chen ,  Haijing Cao

    发明人: Yaojian Lin ,  Jianmin Fang ,  Kang Chen ,  Haijing Cao

    IPC分类号: H01L21/00

    CPC分类号: H01L23/3135 ,  H01L23/24 ,  H01L23/31 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/3157 ,  H01L23/5283 ,  H01L23/552 ,  H01L23/66 ,  H01L24/24 ,  H01L25/105 ,  H01L25/16 ,  H01L25/50 ,  H01L2223/6677 ,  H01L2224/04042 ,  H01L2224/0554 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/12105 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/24195 ,  H01L2224/73265 ,  H01L2224/81005 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/09701 ,  H01L2924/12041 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19104 ,  H01L2924/19105 ,  H01L2924/30105 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

    摘要: A semiconductor device has a first insulation layer formed over a sacrificial substrate. A first conductive layer is formed over the first insulating layer. Conductive pillars are formed over the first conductive layer. A pre-fabricated IPD is disposed between the conductive pillars. An encapsulant is formed around the IPD and conductive pillars. A second insulation layer is formed over the encapsulant. The conductive pillars are electrically connected to the first and second conductive layers. The first and second conductive layers each include an inductor. Semiconductor devices are mounted over the first and second insulating layer and electrically connected to the first and second conductive layers, respectively. An interconnect structure is formed over the first and second insulating layers, respectively, and electrically connected to the first and second conductive layers. The sacrificial substrate is removed. The semiconductor devices can be stacked and electrically interconnected through the conductive pillars.

    摘要翻译: 半导体器件具有形成在牺牲衬底上的第一绝缘层。 在第一绝缘层上形成第一导电层。 导电柱形成在第一导电层上。 预制IPD设置在导电柱之间。 在IPD和导电柱周围形成密封剂。 在密封剂上形成第二绝缘层。 导电柱电连接到第一和第二导电层。 第一和第二导电层各自包括电感器。 半导体器件安装在第一和第二绝缘层上,并分别电连接到第一和第二导电层。 互连结构分别形成在第一和第二绝缘层上,并且电连接到第一和第二导电层。 去除牺牲衬底。 半导体器件可以通过导电柱堆叠和电互连。

    Semiconductor Device and Method of Forming a Fan-Out Structure with Integrated Passive Device and Discrete Component
    23.
    发明申请
    Semiconductor Device and Method of Forming a Fan-Out Structure with Integrated Passive Device and Discrete Component 有权
    具有集成无源器件和离散元件的半导体器件和形成扇出结构的方法

    公开(公告)号:US20100059855A1

    公开(公告)日:2010-03-11

    申请号:US12207332

    申请日:2008-09-09

    申请人: Yaojian Lin ,  Jianmin Fang ,  Kang Chen ,  Haijing Cao

    发明人: Yaojian Lin ,  Jianmin Fang ,  Kang Chen ,  Haijing Cao

    IPC分类号: H01L29/00 ,  H01L21/00

    CPC分类号: H01L21/565 ,  H01L21/568 ,  H01L23/3114 ,  H01L23/49816 ,  H01L23/5223 ,  H01L23/5227 ,  H01L23/5389 ,  H01L24/03 ,  H01L24/11 ,  H01L24/13 ,  H01L24/48 ,  H01L2221/68372 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/1134 ,  H01L2224/16235 ,  H01L2224/20 ,  H01L2224/24195 ,  H01L2224/2518 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/12041 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18162 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

    摘要: A semiconductor device is made by providing a temporary carrier for supporting the semiconductor device. An integrated passive device (IPD) is mounted to the temporary carrier using an adhesive. The IPD includes a capacitor and a resistor and has a plurality of through-silicon vias (TSVs). A discrete component is mounted to the temporary carrier using the adhesive. The discrete component includes a capacitor. The IPD and the discrete component are encapsulated using a molding compound. A first metal layer is formed over the molding compound. The first metal layer is connected to the TSVs of the IPD and forms an inductor. The temporary carrier and the adhesive are removed, and a second metal layer is formed over the IPD and the discrete component. The second metal layer interconnects the IPD and the discrete component and forms an inductor. An optional interconnect structure is formed over the second metal layer.

    摘要翻译: 通过提供用于支撑半导体器件的临时载体来制造半导体器件。 使用粘合剂将集成无源器件(IPD)安装到临时载体上。 IPD包括电容器和电阻器,并且具有多个穿硅通孔(TSV)。 使用粘合剂将分立的部件安装到临时载体上。 分立元件包括电容器。 使用模塑料封装IPD和分立组件。 在模塑料上形成第一金属层。 第一金属层连接到IPD的TSV并形成电感器。 去除临时载体和粘合剂,并且在IPD和分立组件上形成第二金属层。 第二金属层将IPD和分立元件互连并形成电感器。 在第二金属层上形成可选的互连结构。

    Semiconductor Device and Method of Forming Integrated Passive Device Module
    24.
    发明申请
    Semiconductor Device and Method of Forming Integrated Passive Device Module 有权
    半导体器件和形成集成无源器件模块的方法

    公开(公告)号:US20090155959A1

    公开(公告)日:2009-06-18

    申请号:US11958603

    申请日:2007-12-18

    申请人: Yaojian Lin ,  Haijing Cao ,  Qing Zhang ,  Kang Chen ,  Jianmin Fang

    发明人: Yaojian Lin ,  Haijing Cao ,  Qing Zhang ,  Kang Chen ,  Jianmin Fang

    IPC分类号: H01L21/50

    CPC分类号: H01L23/50 ,  H01L21/4857 ,  H01L21/6835 ,  H01L23/3121 ,  H01L23/49822 ,  H01L23/49827 ,  H01L24/16 ,  H01L24/48 ,  H01L25/16 ,  H01L2221/68345 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48105 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/73204 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19015 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H05K1/16 ,  H05K1/162 ,  H05K1/165 ,  H05K1/167 ,  H05K3/20 ,  H05K3/4602 ,  H05K2201/0352 ,  H05K2201/09509 ,  H05K2201/09518 ,  H05K2201/09736 ,  H05K2203/016 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

    摘要: A method of manufacturing a semiconductor device includes providing a substrate with an insulation layer disposed on a top surface of the substrate, forming a passive device over the top surface of the substrate, removing the substrate, depositing an insulating polymer film layer over the insulation layer, and depositing a metal layer over the insulating polymer film layer. A solder mask can be formed over the metal layer. A conformal metal layer can then be formed over the solder mask. A notch can be formed in the insulation layer to enhance the connection between the insulating polymer film layer and the insulation layer. Additional semiconductor die can be electrically connected to the passive device. The substrate is removed by removing a first amount of the substrate using a back grind process, and then removing a second amount of the substrate using a wet dry, dry etch, or chemical-mechanical planarization process.

    摘要翻译: 一种制造半导体器件的方法包括:在衬底的顶表面上设置绝缘层,在衬底的顶表面上形成无源器件,去除衬底,在绝缘层上沉积绝缘聚合物膜层 并且在绝缘聚合物膜层上沉积金属层。 可以在金属层上形成焊接掩模。 然后可以在焊接掩模上形成保形金属层。 可以在绝缘层中形成切口以增强绝缘聚合物膜层和绝缘层之间的连接。 另外的半导体管芯可以电连接到无源器件。 通过使用后研磨工艺去除第一量的基材,然后使用湿干,干蚀刻或化学机械平面化工艺除去第二量的基材来除去基材。

    Semiconductor Device and Method of Making Integrated Passive Devices
    25.
    发明申请
    Semiconductor Device and Method of Making Integrated Passive Devices 有权
    制造集成无源器件的半导体器件及方法

    公开(公告)号:US20090140421A1

    公开(公告)日:2009-06-04

    申请号:US11949255

    申请日:2007-12-03

    申请人: Yaojian Lin ,  Haijing Cao ,  Qing Zhang ,  Kang Chen ,  Jianmin Fang

    发明人: Yaojian Lin ,  Haijing Cao ,  Qing Zhang ,  Kang Chen ,  Jianmin Fang

    IPC分类号: H01L23/48 ,  H01L21/44 ,  H01L21/4763

    CPC分类号: H01L23/5389 ,  H01L21/6835 ,  H01L23/49822 ,  H01L23/50 ,  H01L24/16 ,  H01L24/48 ,  H01L27/1266 ,  H01L28/00 ,  H01L28/10 ,  H01L28/20 ,  H01L28/40 ,  H01L2221/68345 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/04941 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/30105 ,  H01L2224/05599 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

    摘要: A semiconductor device has integrated passive circuit elements. A first substrate is formed on a backside of the semiconductor device. The passive circuit element is formed over the insulating layer. The passive circuit element can be an inductor, capacitor, or resistor. A passivation layer is formed over the passive circuit element. A carrier is attached to the passivation layer. The first substrate is removed. A non-silicon substrate is formed over the insulating layer on the backside of the semiconductor device. The non-silicon substrate is made with glass, molding compound, epoxy, polymer, or polymer composite. An adhesive layer is formed between the non-silicon substrate and insulating layer. A via is formed between the insulating layer and first passivation layer. The carrier is removed. An under bump metallization is formed over the passivation layer in electrical contact with the passive circuit element. A solder bump is formed on the under bump metallization.

    摘要翻译: 半导体器件集成无源电路元件。 第一衬底形成在半导体器件的背面。 无源电路元件形成在绝缘层上。 无源电路元件可以是电感器,电容器或电阻器。 钝化层形成在无源电路元件上。 载体附着在钝化层上。 去除第一衬底。 在半导体器件的背面上的绝缘层上形成非硅衬底。 非硅衬底由玻璃,模塑料,环氧树脂,聚合物或聚合物复合材料制成。 在非硅衬底和绝缘层之间形成粘合剂层。 在绝缘层和第一钝化层之间形成通孔。 载体被移除。 在与无源电路元件电接触的钝化层之上形成凸起下金属化。 在凸块下方形成焊锡凸块。

    Semiconductor device and method of forming a fan-out structure with integrated passive device and discrete component
    26.
    发明授权
    Semiconductor device and method of forming a fan-out structure with integrated passive device and discrete component 有权

    公开(公告)号:US09865482B2

    公开(公告)日:2018-01-09

    申请号:US13438696

    申请日:2012-04-03

    申请人: Yaojian Lin ,  Jianmin Fang ,  Kang Chen ,  Haijing Cao

    发明人: Yaojian Lin ,  Jianmin Fang ,  Kang Chen ,  Haijing Cao

    IPC分类号: H01L23/522 ,  H01L21/56 ,  H01L23/31 ,  H01L23/538 ,  H01L23/498 ,  H01L23/00

    CPC分类号: H01L21/565 ,  H01L21/568 ,  H01L23/3114 ,  H01L23/49816 ,  H01L23/5223 ,  H01L23/5227 ,  H01L23/5389 ,  H01L24/03 ,  H01L24/11 ,  H01L24/13 ,  H01L24/48 ,  H01L2221/68372 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/1134 ,  H01L2224/16235 ,  H01L2224/20 ,  H01L2224/24195 ,  H01L2224/2518 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/12041 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18162 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

    摘要: A semiconductor device is made by providing a temporary carrier for supporting the semiconductor device. An integrated passive device (IPD) is mounted to the temporary carrier using an adhesive. The IPD includes a capacitor and a resistor and has a plurality of through-silicon vias (TSVs). A discrete component is mounted to the temporary carrier using the adhesive. The discrete component includes a capacitor. The IPD and the discrete component are encapsulated using a molding compound. A first metal layer is formed over the molding compound. The first metal layer is connected to the TSVs of the IPD and forms an inductor. The temporary carrier and the adhesive are removed, and a second metal layer is formed over the IPD and the discrete component. The second metal layer interconnects the IPD and the discrete component and forms an inductor. An optional interconnect structure is formed over the second metal layer.

    Semiconductor device and method of forming interconnect substrate for FO-WLCSP
    27.
    发明授权
    Semiconductor device and method of forming interconnect substrate for FO-WLCSP 有权

    公开(公告)号:US09679863B2

    公开(公告)日:2017-06-13

    申请号:US13243214

    申请日:2011-09-23

    申请人: Yaojian Lin ,  Jianmin Fang ,  Xia Feng ,  Kang Chen

    发明人: Yaojian Lin ,  Jianmin Fang ,  Xia Feng ,  Kang Chen

    IPC分类号: H01L23/48 ,  H01L23/00 ,  H01L21/56 ,  H01L25/10 ,  H01L25/00 ,  H01L23/498 ,  H01L23/538 ,  H01L23/31 ,  H01L21/683

    CPC分类号: H01L23/562 ,  H01L21/4853 ,  H01L21/486 ,  H01L21/561 ,  H01L21/565 ,  H01L21/568 ,  H01L21/6835 ,  H01L21/6836 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/5384 ,  H01L23/5386 ,  H01L23/5389 ,  H01L24/11 ,  H01L24/13 ,  H01L24/19 ,  H01L24/20 ,  H01L24/24 ,  H01L24/81 ,  H01L24/82 ,  H01L24/94 ,  H01L24/96 ,  H01L24/97 ,  H01L25/105 ,  H01L25/50 ,  H01L2221/68304 ,  H01L2221/68331 ,  H01L2221/68359 ,  H01L2221/68377 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1134 ,  H01L2224/1145 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/11849 ,  H01L2224/11901 ,  H01L2224/12105 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/16145 ,  H01L2224/16237 ,  H01L2224/2101 ,  H01L2224/211 ,  H01L2224/215 ,  H01L2224/24155 ,  H01L2224/245 ,  H01L2224/81815 ,  H01L2224/82005 ,  H01L2224/82101 ,  H01L2224/82106 ,  H01L2224/82986 ,  H01L2224/94 ,  H01L2224/96 ,  H01L2224/97 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/01322 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/0105 ,  H01L2924/01028 ,  H01L2924/01079 ,  H01L2924/01047 ,  H01L2924/00014 ,  H01L2924/01082 ,  H01L2224/81 ,  H01L2224/82 ,  H01L2224/19 ,  H01L2224/11 ,  H01L2924/00012 ,  H01L2224/1146

    摘要: A semiconductor device has a first encapsulant deposited over a first carrier. A plurality of conductive vias is formed through the first encapsulant to provide an interconnect substrate. A first semiconductor die is mounted over a second carrier. The interconnect substrate is mounted over the second carrier adjacent to the first semiconductor die. A second semiconductor die is mounted over the second carrier adjacent to the interconnect substrate. A second encapsulant is deposited over the first and second semiconductor die, interconnect substrate, and second carrier. A first interconnect structure is formed over a first surface of the second encapsulant and electrically connected to the conductive vias. A second interconnect structure is formed over a second surface of the second encapsulant and electrically connected to the conductive vias to make the Fo-WLCSP stackable. Additional semiconductor die can be mounted over the first and second semiconductor die in a PoP arrangement.

    Semiconductor device and method of forming an embedded SOP fan-out package
    28.
    发明授权
    Semiconductor device and method of forming an embedded SOP fan-out package 有权
    半导体器件和形成嵌入式SOP扇出封装的方法

    公开(公告)号:US09385006B2

    公开(公告)日:2016-07-05

    申请号:US13529918

    申请日:2012-06-21

    申请人: Yaojian Lin ,  Kang Chen

    发明人: Yaojian Lin ,  Kang Chen

    IPC分类号: H01L23/48 ,  H01L21/56 ,  H01L23/31 ,  H01L23/00 ,  H01L25/03 ,  H01L25/00 ,  H01L23/498 ,  H01L23/538

    CPC分类号: H01L23/49827 ,  H01L21/4853 ,  H01L21/56 ,  H01L21/561 ,  H01L21/568 ,  H01L21/78 ,  H01L23/3114 ,  H01L23/3121 ,  H01L23/3128 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/5389 ,  H01L23/562 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/19 ,  H01L24/20 ,  H01L24/24 ,  H01L24/27 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L24/82 ,  H01L24/83 ,  H01L24/85 ,  H01L24/92 ,  H01L24/94 ,  H01L24/97 ,  H01L25/03 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/04105 ,  H01L2224/05082 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/06131 ,  H01L2224/06133 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1134 ,  H01L2224/1145 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/11849 ,  H01L2224/11901 ,  H01L2224/12105 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16225 ,  H01L2224/2101 ,  H01L2224/215 ,  H01L2224/2401 ,  H01L2224/24011 ,  H01L2224/2402 ,  H01L2224/245 ,  H01L2224/27334 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/48245 ,  H01L2224/48247 ,  H01L2224/48811 ,  H01L2224/48824 ,  H01L2224/48839 ,  H01L2224/48844 ,  H01L2224/48847 ,  H01L2224/48855 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/81191 ,  H01L2224/82101 ,  H01L2224/82104 ,  H01L2224/82106 ,  H01L2224/83132 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/83856 ,  H01L2224/85411 ,  H01L2224/85424 ,  H01L2224/85439 ,  H01L2224/85444 ,  H01L2224/85447 ,  H01L2224/85455 ,  H01L2224/92147 ,  H01L2224/92244 ,  H01L2224/92247 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2924/00011 ,  H01L2924/01322 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/3025 ,  H01L2924/3511 ,  H01L2924/3512 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2224/03 ,  H01L2924/00012 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2224/27 ,  H01L2924/014 ,  H01L2924/01082 ,  H01L2924/0105 ,  H01L2224/81805 ,  H01L2924/01005

    摘要: A semiconductor device includes a ball grid array (BGA) package including first bumps. A first semiconductor die is mounted to the BGA package between the first bumps. The BGA package and first semiconductor die are mounted to a carrier. A first encapsulant is deposited over the carrier and around the BGA package and first semiconductor die. The carrier is removed to expose the first bumps and first semiconductor die. An interconnect structure is electrically connected to the first bumps and first semiconductor die. The BGA package further includes a substrate and a second semiconductor die mounted, and electrically connected, to the substrate. A second encapsulant is deposited over the second semiconductor die and substrate. The first bumps are formed over the substrate opposite the second semiconductor die. A warpage balance layer is formed over the BGA package.

    摘要翻译: 半导体器件包括包括第一凸点的球栅阵列(BGA)封装。 第一半导体管芯安装到第一凸块之间的BGA封装。 BGA封装和第一半导体管芯安装在载体上。 第一密封剂沉积在载体上并且围绕BGA封装和第一半导体管芯。 移除载体以暴露第一凸块和第一半导体管芯。 互连结构电连接到第一凸块和第一半导体管芯。 BGA封装还包括基板和安装并电连接到基板的第二半导体管芯。 第二密封剂沉积在第二半导体管芯和衬底上。 第一凸起形成在与第二半导体管芯相对的衬底上。 在BGA封装上形成翘曲平衡层。

    Semiconductor device and method of forming an IPD over a high-resistivity encapsulant separated from other IPDS and baseband circuit
    29.
    发明授权
    Semiconductor device and method of forming an IPD over a high-resistivity encapsulant separated from other IPDS and baseband circuit 有权
    在与其他IPDS和基带电路分离的高电阻率密封剂上形成IPD的半导体器件和方法

    公开(公告)号:US09269598B2

    公开(公告)日:2016-02-23

    申请号:US13569105

    申请日:2012-08-07

    申请人: Yaojian Lin ,  Jianmin Fang ,  Kang Chen ,  Haijing Cao

    发明人: Yaojian Lin ,  Jianmin Fang ,  Kang Chen ,  Haijing Cao

    IPC分类号: H01L27/08 ,  H01L21/56 ,  H01L21/683 ,  H01L25/16 ,  H01L25/00 ,  H01L25/03 ,  H01L23/538 ,  H01L23/00

    CPC分类号: H01L21/568 ,  H01L21/6835 ,  H01L23/5389 ,  H01L24/16 ,  H01L24/81 ,  H01L25/03 ,  H01L25/16 ,  H01L25/50 ,  H01L2224/04042 ,  H01L2224/0554 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/81001 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/04941 ,  H01L2924/09701 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15174 ,  H01L2924/15184 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/30105 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/81805 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

    摘要: A semiconductor device has a first conductive layer formed over a sacrificial substrate. A first integrated passive device (IPD) is formed in a first region over the first conductive layer. A conductive pillar is formed over the first conductive layer. A high-resistivity encapsulant greater than 1.0 kohm-cm is formed over the first IPD to a top surface of the conductive pillar. A second IPD is formed over the encapsulant. The first encapsulant has a thickness of at least 50 micrometers to vertically separate the first and second IPDs. An insulating layer is formed over the second IPD. The sacrificial substrate is removed and a second semiconductor die is disposed on the first conductive layer. A first semiconductor die is formed in a second region over the substrate. A second encapsulant is formed over the second semiconductor die and a thermally conductive layer is formed over the second encapsulant.

    摘要翻译: 半导体器件具有形成在牺牲衬底上的第一导电层。 第一集成无源器件(IPD)形成在第一导电层上的第一区域中。 在第一导电层上形成导电柱。 在第一IPD上形成大于1.0kohm-cm的高电阻率密封剂到导电柱的顶表面。 在密封剂上形成第二个IPD。 第一密封剂具有至少50微米的厚度以垂直分离第一和第二IPD。 绝缘层形成在第二IPD上。 去除牺牲基板,在第一导电层上设置第二半导体管芯。 第一半导体管芯形成在衬底上的第二区域中。 在第二半导体管芯上形成第二密封剂,并且在第二密封剂上形成导热层。

    Semiconductor Device and Method of Forming an Embedded SOP Fan-Out Package
    30.
    发明申请
    Semiconductor Device and Method of Forming an Embedded SOP Fan-Out Package 有权
    半导体器件和形成嵌入式SOP扇出封装的方法

    公开(公告)号:US20130341784A1

    公开(公告)日:2013-12-26

    申请号:US13529918

    申请日:2012-06-21

    申请人: Yaojian Lin ,  Kang Chen

    发明人: Yaojian Lin ,  Kang Chen

    IPC分类号: H01L23/48 ,  H01L21/56

    CPC分类号: H01L23/49827 ,  H01L21/4853 ,  H01L21/56 ,  H01L21/561 ,  H01L21/568 ,  H01L21/78 ,  H01L23/3114 ,  H01L23/3121 ,  H01L23/3128 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/5389 ,  H01L23/562 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/19 ,  H01L24/20 ,  H01L24/24 ,  H01L24/27 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L24/82 ,  H01L24/83 ,  H01L24/85 ,  H01L24/92 ,  H01L24/94 ,  H01L24/97 ,  H01L25/03 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/04105 ,  H01L2224/05082 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/06131 ,  H01L2224/06133 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1134 ,  H01L2224/1145 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/11849 ,  H01L2224/11901 ,  H01L2224/12105 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16225 ,  H01L2224/2101 ,  H01L2224/215 ,  H01L2224/2401 ,  H01L2224/24011 ,  H01L2224/2402 ,  H01L2224/245 ,  H01L2224/27334 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/48245 ,  H01L2224/48247 ,  H01L2224/48811 ,  H01L2224/48824 ,  H01L2224/48839 ,  H01L2224/48844 ,  H01L2224/48847 ,  H01L2224/48855 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/81191 ,  H01L2224/82101 ,  H01L2224/82104 ,  H01L2224/82106 ,  H01L2224/83132 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/83856 ,  H01L2224/85411 ,  H01L2224/85424 ,  H01L2224/85439 ,  H01L2224/85444 ,  H01L2224/85447 ,  H01L2224/85455 ,  H01L2224/92147 ,  H01L2224/92244 ,  H01L2224/92247 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2924/00011 ,  H01L2924/01322 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/3025 ,  H01L2924/3511 ,  H01L2924/3512 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2224/03 ,  H01L2924/00012 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2224/27 ,  H01L2924/014 ,  H01L2924/01082 ,  H01L2924/0105 ,  H01L2224/81805 ,  H01L2924/01005

    摘要: A semiconductor device includes a ball grid array (BGA) package including first bumps. A first semiconductor die is mounted to the BGA package between the first bumps. The BGA package and first semiconductor die are mounted to a carrier. A first encapsulant is deposited over the carrier and around the BGA package and first semiconductor die. The carrier is removed to expose the first bumps and first semiconductor die. An interconnect structure is electrically connected to the first bumps and first semiconductor die. The BGA package further includes a substrate and a second semiconductor die mounted, and electrically connected, to the substrate. A second encapsulant is deposited over the second semiconductor die and substrate. The first bumps are formed over the substrate opposite the second semiconductor die. A warpage balance layer is formed over the BGA package.

    摘要翻译: 半导体器件包括包括第一凸点的球栅阵列(BGA)封装。 第一半导体管芯安装到第一凸块之间的BGA封装。 BGA封装和第一半导体管芯安装在载体上。 第一密封剂沉积在载体上并且围绕BGA封装和第一半导体管芯。 移除载体以暴露第一凸块和第一半导体管芯。 互连结构电连接到第一凸块和第一半导体管芯。 BGA封装还包括基板和安装并电连接到基板的第二半导体管芯。 第二密封剂沉积在第二半导体管芯和衬底上。 第一凸起形成在与第二半导体管芯相对的衬底上。 在BGA封装上形成翘曲平衡层。

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