-
公开(公告)号:US20190157445A1
公开(公告)日:2019-05-23
申请号:US16253158
申请日:2019-01-21
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Li-Wei Feng , Shih-Hung Tsai , Chao-Hung Lin , Chih-Kai Hsu , Yu-Hsiang Hung , Jyh-Shyang Jenq
Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a first region and a second region; forming a first fin-shaped structure on the first region and a second fin-shaped structure on the second region; forming a first spacer adjacent to the first fin-shaped structure and a second spacer adjacent to the second fin-shaped structure; and using the first spacer and the second spacer as mask to remove part of the substrate for forming a third fin-shaped structure on the first region and a fourth fin-shaped structure on the second region, in which the third fin-shaped structure includes a first top portion and a first bottom portion and the fourth fin-shaped structure includes a second top portion and a second bottom portion;
-
公开(公告)号:US20180342426A1
公开(公告)日:2018-11-29
申请号:US16053737
申请日:2018-08-02
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Li-Wei Feng , Shih-Hung Tsai , Chao-Hung Lin , Hon-Huei Liu , Shih-Fang Hong , Jyh-Shyang Jenq
IPC: H01L21/8238 , H01L29/78 , H01L29/66 , H01L27/092 , H01L21/225 , H01L21/324
CPC classification number: H01L21/823821 , H01L21/2255 , H01L21/2256 , H01L21/324 , H01L21/823807 , H01L21/823814 , H01L21/823892 , H01L27/0924 , H01L29/66803 , H01L29/7851
Abstract: A semiconductor device includes: a substrate having a first region and a second region; a first fin-shaped structure on the first region and a second fin-shaped structure on the second region, wherein each of the first fin-shaped structure and the second fin-shaped structure comprises a top portion and a bottom portion; a first doped layer around the bottom portion of the first fin-shaped structure; a second doped layer around the bottom portion of the second fin-shaped structure; a first liner on the first doped layer; and a second liner on the second doped layer.
-
公开(公告)号:US20180197981A1
公开(公告)日:2018-07-12
申请号:US15916261
申请日:2018-03-08
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Li-Wei Feng , Shih-Hung Tsai , Chao-Hung Lin , Chih-Kai Hsu , Yu-Hsiang Hung , Jyh-Shyang Jenq
CPC classification number: H01L29/785 , H01L29/66795 , H01L29/66803
Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a first fin-shaped structure thereon; forming a spacer adjacent to the first fin-shaped structure; using the spacer as mask to remove part of the substrate for forming a second fin-shaped structure, wherein the second fin-shaped structure comprises a top portion and a bottom portion; and forming a doped portion in the bottom portion of the second fin-shaped structure.
-
公开(公告)号:US20170194203A1
公开(公告)日:2017-07-06
申请号:US15014034
申请日:2016-02-03
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Yu-Hsiang Hung , Ssu-I Fu , Chao-Hung Lin , Chih-Kai Hsu , Jyh-Shyang Jenq
IPC: H01L21/768 , H01L29/78 , H01L29/06 , H01L21/033 , H01L29/66 , H01L23/535 , H01L21/8234 , H01L27/11 , H01L29/08
CPC classification number: H01L21/76897 , H01L21/0332 , H01L21/0335 , H01L21/0337 , H01L21/0338 , H01L21/76816 , H01L21/76895 , H01L21/823418 , H01L21/823431 , H01L21/823475 , H01L21/823481 , H01L23/535 , H01L27/1104 , H01L27/1116 , H01L28/00 , H01L29/0653 , H01L29/0847 , H01L29/66545 , H01L29/7851
Abstract: A semiconductor device and method of forming the same, the semiconductor device includes a first and second fin shaped structures, a first and second gate structures and a first and second plugs. The first and second fin shaped structures are disposed on a first region and a second region of a substrate and the first and second gate structure are disposed across the first and second fin shaped structures, respectively. A dielectric layer is disposed on the substrate, covering the first and second gate structure. The first and second plugs are disposed in the dielectric layer, wherein the first plug is electrically connected first source/drain regions adjacent to the first gate structure and contacts sidewalls of the first gate structure, and the second plug is electrically connected to second source/drain regions adjacent to the second gate structure and not contacting sidewalls of the second gate structure.
-
公开(公告)号:US20170133479A1
公开(公告)日:2017-05-11
申请号:US14957623
申请日:2015-12-03
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Ying-Chiao Wang , Chao-Hung Lin , Ssu-I Fu , Jyh-Shyang Jenq , Li-Wei Feng , Yu-Hsiang Hung
IPC: H01L29/66 , H01L21/311 , H01L21/033 , H01L21/3105 , H01L29/78 , H01L21/32
CPC classification number: H01L29/6656 , H01L21/0332 , H01L21/31053 , H01L21/31144 , H01L21/32 , H01L29/66545 , H01L29/78
Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having a gate structure thereon, a first spacer around the gate structure, and a contact etch stop layer (CESL) adjacent to the first spacer; forming a cap layer on the gate structure, the first spacer, and the CESL; and removing part of the cap layer for forming a second spacer adjacent to the CESL.
-
公开(公告)号:US09589966B2
公开(公告)日:2017-03-07
申请号:US14724775
申请日:2015-05-28
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Chih-Kai Hsu , Chao-Hung Lin , Yu-Hsiang Hung , Ssu-I Fu , Jyh-Shyang Jenq
CPC classification number: H01L27/1104 , H01L27/0207
Abstract: A static random access memory (SRAM) is disclosed. The SRAM includes a plurality of SRAM cells on a substrate, in which each of the SRAM cells comprises: a gate structure on the substrate; a first interlayer dielectric (ILD) layer around the gate structure; a first contact plug in the first ILD layer; a second ILD layer on the first ILD layer; and a second contact plug in the second ILD layer and electrically connected to the first contact plug.
Abstract translation: 公开了一种静态随机存取存储器(SRAM)。 SRAM包括在衬底上的多个SRAM单元,其中每个SRAM单元包括:衬底上的栅极结构; 围绕栅极结构的第一层间电介质(ILD)层; 第一ILD层中的第一接触插塞; 第一ILD层上的第二ILD层; 以及在所述第二ILD层中的第二接触插塞,并且电连接到所述第一接触插塞。
-
公开(公告)号:US20170033015A1
公开(公告)日:2017-02-02
申请号:US15293292
申请日:2016-10-14
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Li-Wei Feng , Shih-Hung Tsai , Hon-Huei Liu , Chao-Hung Lin , Nan-Yuan Huang , Jyh-Shyang Jenq
IPC: H01L21/8234 , H01L29/423 , H01L21/308 , H01L27/088
CPC classification number: H01L21/823431 , H01L21/308 , H01L21/76224 , H01L21/823481 , H01L27/088 , H01L27/0886 , H01L27/092 , H01L29/0649 , H01L29/165 , H01L29/42372 , H01L29/7842 , H01L29/785
Abstract: The present invention provides a method for forming a semiconductor structure, comprising: firstly, a substrate is provided, having a first fin structure and a second fin structure disposed thereon, next, a first isolation region is formed between the first fin structure and the second fin structure, a second isolation region is formed opposite the first fin structure from the first isolation region, and at least an epitaxial layer is formed on the side of the first fin structure and the second fin structure, wherein the epitaxial layer has a bottom surface, the bottom surface extending from the first fin structure to the second fin structure, and the bottom surface is lower than a bottom surface of the first isolation region and a top surface of the second isolation region, in addition, the epitaxial layer has a stepped-shaped sidewall profile.
Abstract translation: 本发明提供一种半导体结构的形成方法,其特征在于,首先,设置具有第一鳍结构和设置在其上的第二鳍结构的衬底,接着,在所述第一鳍结构和所述第二鳍结构之间形成第一隔离区 鳍结构,与第一隔离区相对地形成第二隔离区,并且在第一鳍结构和第二鳍结构的一侧形成至少外延层,其中外延层具有底表面 所述底表面从所述第一鳍结构延伸到所述第二鳍结构,并且所述底表面低于所述第一隔离区域的底表面和所述第二隔离区域的顶表面,此外,所述外延层具有阶梯状 形侧壁轮廓。
-
公开(公告)号:US09502252B2
公开(公告)日:2016-11-22
申请号:US14637400
申请日:2015-03-04
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Li-Wei Feng , Shih-Hung Tsai , Chao-Hung Lin , Hon-Huei Liu , Shih-Fang Hong , Jyh-Shyang Jenq
IPC: H01L21/225 , H01L21/8238 , H01L21/324 , H01L27/092
CPC classification number: H01L21/823821 , H01L21/2255 , H01L21/2256 , H01L21/324 , H01L21/823807 , H01L21/823814 , H01L21/823892 , H01L27/0924 , H01L29/66803 , H01L29/7851
Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having at least one fin-shaped structure thereon, in which the fin-shaped structure comprises a top portion and a bottom portion; and forming a doped layer and a first liner around the bottom portion of the fin-shaped structure.
Abstract translation: 公开了半导体器件的制造方法。 该方法包括以下步骤:提供其上具有至少一个鳍状结构的基底,其中鳍状结构包括顶部和底部; 以及围绕所述鳍状结构的底部部分形成掺杂层和第一衬垫。
-
公开(公告)号:US20160322366A1
公开(公告)日:2016-11-03
申请号:US14724775
申请日:2015-05-28
Applicant: United Microelectronics Corp.
Inventor: Chih-Kai Hsu , Chao-Hung Lin , Yu-Hsiang Hung , Ssu-I Fu , Jyh-Shyang Jenq
CPC classification number: H01L27/1104 , H01L27/0207
Abstract: A static random access memory (SRAM) is disclosed. The SRAM includes a plurality of SRAM cells on a substrate, in which each of the SRAM cells comprises: a gate structure on the substrate; a first interlayer dielectric (ILD) layer around the gate structure; a first contact plug in the first ILD layer; a second ILD layer on the first ILD layer; and a second contact plug in the second ILD layer and electrically connected to the first contact plug.
Abstract translation: 公开了一种静态随机存取存储器(SRAM)。 SRAM包括在衬底上的多个SRAM单元,其中每个SRAM单元包括:衬底上的栅极结构; 围绕栅极结构的第一层间电介质(ILD)层; 第一ILD层中的第一接触插塞; 第一ILD层上的第二ILD层; 以及在所述第二ILD层中的第二接触插塞,并且电连接到所述第一接触插塞。
-
公开(公告)号:US09455194B1
公开(公告)日:2016-09-27
申请号:US14864852
申请日:2015-09-24
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Li-Wei Feng , Chien-Ting Lin , Shih-Hung Tsai , Ssu-I Fu , Hon-Huei Liu , Shih-Fang Hong , Chao-Hung Lin , Jyh-Shyang Jenq
IPC: H01L21/461 , H01L21/8234 , H01L21/3065 , H01L21/308
CPC classification number: H01L21/823412 , H01L21/3086 , H01L21/823431
Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having a first region and a second region defined thereon; forming a material layer on the substrate; forming a plurality of first mandrels on the material layer of the first region and the second region; forming first spacers adjacent to the first mandrels; forming a hard mask on the first region; trimming the first spacers on the second region; removing the first mandrels; using the first spacers to remove part of the material layer for forming a plurality of second mandrels; forming second spacers adjacent to the second mandrels; removing the second mandrels; and using the second spacers to remove part of the substrate for forming a plurality of fin-shaped structures.
Abstract translation: 公开了半导体器件的制造方法。 该方法包括以下步骤:提供具有限定在其上的第一区域和第二区域的衬底; 在所述基板上形成材料层; 在所述第一区域和所述第二区域的材料层上形成多个第一心轴; 形成与所述第一心轴相邻的第一间隔件; 在第一区域上形成硬掩模; 修剪第二区域上的第一间隔物; 去除第一个心轴; 使用所述第一间隔件去除用于形成多个第二心轴的所述材料层的一部分; 形成与所述第二心轴相邻的第二间隔件; 移除第二个心轴; 并且使用第二间隔件去除用于形成多个鳍状结构的基板的一部分。
-
-
-
-
-
-
-
-
-