Abstract:
Consistent with example embodiments, a wafer substrate undergoes processing in which a resilient material is applied to the front-side and back-side surfaces of the wafer substrate. By defining trenches in saw lanes between active device die, additional resilient material may be placed therein. In an example embodiment, after the active device die are separated into individual product devices, the resulting product device has coverage on the front-side surface, back-side surface, and the four vertical faces of the encapsulated active device die. The front-side surface has exposed contact areas so that the product device may be attached to an end user's system circuit board. Further, the resilient coating protects the encapsulated active device die from damage during assembly.
Abstract:
Dual-interface Integrated Circuit (IC) card components and methods for manufacturing the dual-interface IC card components are described. In an embodiment, a dual-interface IC card component includes a single-sided contact base structure, which includes a substrate with an electrical contact layer. On the single-sided contact base structure, one or more antenna contact leads are attached to the single-sided contact base structure to form a dual-interface contact structure, which is a component of a dual-interface IC card. Other embodiments are also described.
Abstract:
Consistent with an example embodiment, there is a semiconductor wafer substrate comprising a plurality of integrated circuits formed in arrays of rows and columns on the wafer substrate. A plurality of integrated circuits are in arrays of rows and columns on the wafer substrate; the rows and the columns have a first width. First and second saw lanes separate the integrated circuits, the first saw lanes are arranged parallel and equidistant with one another in a first direction defined by rows, and the second saw lanes are arranged parallel and equidistant with one another in a second direction defined by the columns. A plurality of process modules (PM) are on the wafer substrate, the PM modules defined in an at least one additional row/column having a second width. The at least one additional row/column is parallel to the plurality of device die in one direction.
Abstract:
Consistent with example embodiments, a wafer substrate undergoes processing in which a resilient material is applied to the front-side and back-side surfaces of the wafer substrate. By defining trenches in saw lanes between active device die, additional resilient material may be placed therein. In an example embodiment, after the active device die are separated into individual product devices, the resulting product device has coverage on the front-side surface, back-side surface, and the four vertical faces of the encapsulated active device die. The front-side surface has exposed contact areas so that the product device may be attached to an end user's system circuit board. Further, the resilient coating protects the encapsulated active device die from damage during assembly.
Abstract:
Consistent with example embodiments, a wafer substrate undergoes processing in which a resilient material is applied to the front-side and back-side surfaces of the wafer substrate. By defining trenches in saw lanes between active device die, additional resilient material may be placed therein. In an example embodiment, after the active device die are separated into individual product devices, the resulting product device has coverage on the front-side surface, back-side surface, and the four vertical faces of the encapsulated active device die. The front-side surface has exposed contact areas so that the product device may be attached to an end user's system circuit board. Further, the resilient coating protects the encapsulated active device die from damage during assembly.
Abstract:
Consistent with an example embodiment, there is a method for manufacturing integrated circuit (IC) devices from a wafer substrate, the wafer substrate having a front-side surface with active devices and a back-side surface. A temporary covering to the front-side of the wafer substrate is applied. The back-side of the wafer substrate having a pre-grind thickness is ground to a post-grind thickness. To a predetermined thickness, the back-side of the wafer substrate is coated with a resilient coating. The wafer is mounted onto a second carrier tape on its back-side surface. After removing the temporary carrier tape from the front-side of the wafer substrate, the wafer is sawed along active device boundaries and active devices are singulated.
Abstract:
Embodiments of a packaged semiconductor device with no leads are disclosed. One embodiment includes a semiconductor chip and a no leads package structure defining a boundary and having a bottom surface and includes three or more pads exposed at the bottom surface of the package structure. Each of the pads is located in a single inline row.
Abstract:
Consistent with an example embodiment, there is semiconductor device assembled to resist mechanical damage. The semiconductor device comprises an active circuit defined on a top surface, contact areas providing electrical connection to the active circuit. There is a pedestal structure upon which the active circuit is mounted on an opposite bottom surface; the pedestal structure has an area smaller than the area of the active device. An encapsulation, consisting of a molding compound, surrounds the sides and the underside of the active device and it surrounds the contact areas. The encapsulation provides a resilient surface protecting the active device from mechanical damage. A feature of the embodiment is that the contact areas may have solder bumps defined thereon.