MAXIMIZING POTENTIAL GOOD DIE PER WAFER, PGDW

    公开(公告)号:US20170092636A1

    公开(公告)日:2017-03-30

    申请号:US14869416

    申请日:2015-09-29

    Applicant: NXP B.V.

    CPC classification number: G03F1/44 G03F9/7084 H01L22/30 H01L27/0203

    Abstract: Consistent with an example embodiment, there is a semiconductor wafer substrate comprising a plurality of integrated circuits formed in arrays of rows and columns on the wafer substrate. A plurality of integrated circuits are in arrays of rows and columns on the wafer substrate; the rows and the columns have a first width. First and second saw lanes separate the integrated circuits, the first saw lanes are arranged parallel and equidistant with one another in a first direction defined by rows, and the second saw lanes are arranged parallel and equidistant with one another in a second direction defined by the columns. A plurality of process modules (PM) are on the wafer substrate, the PM modules defined in an at least one additional row/column having a second width. The at least one additional row/column is parallel to the plurality of device die in one direction.

    Individual ROM codes on a single reticle for a plurality of devices
    2.
    发明授权
    Individual ROM codes on a single reticle for a plurality of devices 有权
    用于多个设备的单个掩模版上的单个ROM代码

    公开(公告)号:US08701077B1

    公开(公告)日:2014-04-15

    申请号:US13710291

    申请日:2012-12-10

    Applicant: NXP B.V.

    CPC classification number: G11C17/10 G11C7/24 G11C8/20 H01L27/112

    Abstract: Aspects of the present disclosure are directed toward methods and systems which generate a plurality of Read-Only Memory (ROM) codes. In response to generating the ROM codes, an image is generated for each of the plurality of ROM codes. The images for each of the plurality of ROM codes are mapped on a single reticle, and a wafer is provided, which includes a plurality of individual devices. The reticle is utilized, which includes an image for each of the plurality of ROM codes, to print a respective one of the images onto a respective one of the plurality of individual devices.

    Abstract translation: 本公开的方面涉及生成多个只读存储器(ROM)代码的方法和系统。 响应于产生ROM代码,为多个ROM代码中的每一个生成图像。 多个ROM代码中的每一个的图像被映射在单个掩模版上,并且提供包括多个单独器件的晶片。 使用掩模版,其包括用于多个ROM代码中的每一个的图像,以将相应的一个图像打印到多个单独设备中的相应一个上。

    Maximizing potential good die per wafer, PGDW

    公开(公告)号:US09798228B2

    公开(公告)日:2017-10-24

    申请号:US14869416

    申请日:2015-09-29

    Applicant: NXP B.V.

    CPC classification number: G03F1/44 G03F9/7084 H01L22/30 H01L27/0203

    Abstract: Consistent with an example embodiment, there is a semiconductor wafer substrate comprising a plurality of integrated circuits formed in arrays of rows and columns on the wafer substrate. A plurality of integrated circuits are in arrays of rows and columns on the wafer substrate; the rows and the columns have a first width. First and second saw lanes separate the integrated circuits, the first saw lanes are arranged parallel and equidistant with one another in a first direction defined by rows, and the second saw lanes are arranged parallel and equidistant with one another in a second direction defined by the columns. A plurality of process modules (PM) are on the wafer substrate, the PM modules defined in an at least one additional row/column having a second width. The at least one additional row/column is parallel to the plurality of device die in one direction.

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