METHOD OF FORMING PHOTONICS STRUCTURES

    公开(公告)号:US20220381976A1

    公开(公告)日:2022-12-01

    申请号:US17816336

    申请日:2022-07-29

    Inventor: Gurtej Sandhu

    Abstract: The disclosed embodiments relate to an integrated circuit structure and methods of forming them in which photonic devices are formed on the back end of fabricating a CMOS semiconductor structure containing electronic devices. Doped regions associated with the photonic devices are formed using microwave annealing for dopant activation.

    STT-MRAM cell structures
    26.
    发明授权
    STT-MRAM cell structures 有权
    STT-MRAM细胞结构

    公开(公告)号:US09595664B2

    公开(公告)日:2017-03-14

    申请号:US14595955

    申请日:2015-01-13

    Abstract: A magnetic cell structure including a nonmagnetic bridge, and methods of fabricating the structure are provided. The magnetic cell structure includes a free layer, a pinned layer, and a nonmagnetic bridge electrically connecting the free layer and the pinned layer. The shape and/or configuration of the nonmagnetic bridge directs a programming current through the magnetic cell structure such that the cross sectional area of the programming current in the free layer of the structure is less than the cross section of the structure. The decrease in the cross sectional area of the programming current in the free layer enables a lower programming current to reach a critical switching current density in the free layer and switch the magnetization of the free layer, programming the magnetic cell.

    Abstract translation: 提供包括非磁性桥的磁性单元结构以及制造该结构的方法。 磁性电池结构包括自由层,钉扎层和电连接自由层和钉扎层的非磁性桥。 非磁性桥的形状和/或构造使编程电流通过磁性单元结构,使得结构自由层中编程电流的横截面面积小于结构的横截面。 自由层中编程电流的横截面积的减小使编程电流能够达到自由层中的关键开关电流密度并切换自由层的磁化,对磁性单元进行编程。

    STT-MRAM cell structure incorporating piezoelectric stress material
    28.
    发明授权
    STT-MRAM cell structure incorporating piezoelectric stress material 有权
    STT-MRAM电池结构结合压电应力材料

    公开(公告)号:US09218863B2

    公开(公告)日:2015-12-22

    申请号:US13673130

    申请日:2012-11-09

    Abstract: A magnetic memory cell including a piezoelectric material, and methods of operating the memory cell are provided. The memory cell includes a stack, and the piezoelectric material may be formed as a layer in the stack or adjacent the layers of the cell stack. The piezoelectric material may be used to induce a transient stress during programming of the memory cell to reduce the critical switching current of the memory cell.

    Abstract translation: 提供了包括压电材料的磁存储单元和操作存储单元的方法。 存储单元包括堆叠,并且压电材料可以形成为堆叠中的层或邻近电池堆的层。 压电材料可以用于在编程存储器单元期间引起瞬态应力以减小存储器单元的关键开关电流。

    Method for positioning spacers in pitch multiplication
    29.
    发明授权
    Method for positioning spacers in pitch multiplication 有权
    在间距乘法中定位间隔物的方法

    公开(公告)号:US09117766B2

    公开(公告)日:2015-08-25

    申请号:US14502818

    申请日:2014-09-30

    Abstract: Multiple pitch-multiplied spacers are used to form mask patterns having features with exceptionally small critical dimensions. One of each pair of spacers formed mandrels is removed and alternating layers, formed of two mutually selectively etchable materials, are deposited around the remaining spacers. Layers formed of one of the materials are then etched, leaving behind vertically-extending layers formed of the other of the materials, which form a mask pattern. Alternatively, instead of depositing alternating layers, amorphous carbon is deposited around the remaining spacers followed by a plurality of cycles of forming pairs of spacers on the amorphous carbon, removing one of the pairs of spacers and depositing an amorphous carbon layer. The cycles can be repeated to form the desired pattern. Because the critical dimensions of some features in the pattern can be set by controlling the width of the spaces between spacers, exceptionally small mask features can be formed.

    Abstract translation: 使用多个间距倍数的间隔物来形成具有特别小的临界尺寸的特征的掩模图案。 去除每对间隔件形成的心轴中的一个,并且由两个相互选择性可蚀刻的材料形成的交替层围绕剩余的间隔物沉积。 然后蚀刻由一种材料形成的层,留下由形成掩模图案的另一种材料形成的垂直延伸层。 或者,代替沉积交替的层,非晶碳沉积在剩余的间隔物周围,随后在无定形碳上形成成对隔离物的多个循环,去除一对隔离物之一并沉积无定形碳层。 可以重复循环以形成所需的图案。 由于图案中的某些特征的临界尺寸可以通过控制间隔物之间​​的间隔的宽度来设定,所以可以形成特别小的掩模特征。

    METHOD FOR PROVIDING ELECTRICAL CONNECTIONS TO SPACED CONDUCTIVE LINES
    30.
    发明申请
    METHOD FOR PROVIDING ELECTRICAL CONNECTIONS TO SPACED CONDUCTIVE LINES 有权
    提供电气连接到间隔导电线路的方法

    公开(公告)号:US20150171090A1

    公开(公告)日:2015-06-18

    申请号:US14633189

    申请日:2015-02-27

    Abstract: An integrated circuit and a method of formation provide a contact area formed at an angled end of at least one linearly extending conductive line. In an embodiment, conductive lines with contact landing pads are formed by patterning lines in a mask material, cutting at least one of the material lines to form an angle relative to the extending direction of the material lines, forming extensions from the angled end faces of the mask material, and patterning an underlying conductor by etching using said material lines and extension as a mask. In another embodiment, at least one conductive line is cut at an angle relative to the extending direction of the conductive line to produce an angled end face, and an electrical contact landing pad is formed in contact with the angled end face.

    Abstract translation: 集成电路和形成方法提供形成在至少一个线性延伸导线的成角度端的接触区域。 在一个实施例中,具有接触着陆焊盘的导电线通过在掩模材料中图案化线形成,切割至少一条材料线以相对于材料线的延伸方向形成一角度,从所述材料线的成角度的端面形成延伸部 掩模材料,并通过使用所述材料线和延伸作为掩模进行蚀刻来图案化下面的导体。 在另一个实施例中,至少一条导线相对于导线的延伸方向以一定角度被切割,以产生成角度的端面,并且电接触着陆垫形成为与成角度的端面接触。

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