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公开(公告)号:US20230378025A1
公开(公告)日:2023-11-23
申请号:US18027456
申请日:2021-10-27
申请人: HITACHI, LTD.
发明人: Kyota ASAI , Takeshi TOKUYAMA
IPC分类号: H01L23/473 , H01L23/495 , H01L23/00 , H01L25/065 , H05K7/20
CPC分类号: H01L23/473 , H01L23/49575 , H01L23/49531 , H01L24/32 , H01L24/48 , H01L25/0657 , H05K7/20927 , H01L2924/13055 , H01L2924/1811 , H01L2924/30107 , H01L2924/1205 , H01L2224/48237 , H01L2224/32225
摘要: This power conversion device comprises: first and second power circuit units each having a power semiconductor element and a plurality of conductors that hold the power semiconductor element therebetween and that are connected to an emitter and a collector of the power semiconductor element; and a flow channel forming body which houses the first and second power circuit units and through which a refrigerant flows. A conductor at the emitter side of the first power circuit unit is disposed so as to face a conductor at the collector side of the second power circuit unit. The conductor at the emitter side of the first power circuit unit and the conductor at the collector side of the second power circuit unit are connected to each other via a plurality of conductive fins which are in contact with the refrigerant.
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公开(公告)号:US11652033B2
公开(公告)日:2023-05-16
申请号:US17373165
申请日:2021-07-12
申请人: Rohm Co., Ltd.
IPC分类号: H01L23/495 , H01L23/00
CPC分类号: H01L23/49575 , H01L23/4952 , H01L23/49503 , H01L23/49562 , H01L24/48 , H01L2224/48245 , H01L2924/1033 , H01L2924/1067 , H01L2924/10253 , H01L2924/10271 , H01L2924/10329 , H01L2924/13055 , H01L2924/13064 , H01L2924/13091 , H01L2924/30101 , H01L2924/30107
摘要: A semiconductor device provided with first and second semiconductor element each having an obverse and a reverse surface with a drain electrode, source electrode and gate electrode provided on the obverse surface. The semiconductor device is also provided with a control element electrically connected to the gate electrodes of the respective semiconductor elements, and with a plurality of leads, which include a first lead carrying the first semiconductor element, a second lead carrying the second semiconductor element, and a third lead carrying the control element. The first and second leads overlap with each other as viewed in a first direction perpendicular to the thickness direction of the semiconductor device, and the third lead overlaps with the first and second leads as viewed in a second direction perpendicular to the thickness direction and the first direction.
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13.
公开(公告)号:US20190115481A1
公开(公告)日:2019-04-18
申请号:US16210131
申请日:2018-12-05
申请人: ROHM CO., LTD.
发明人: Hiroki YAMAMOTO
IPC分类号: H01L29/872 , H01L29/66 , H01L29/861 , H01L27/06 , H01L49/02 , H01L29/417 , H01L23/00 , H01L27/102 , H01L23/544 , H01L29/06 , H01L29/866 , H01L23/522 , H01L23/495 , H01L27/07
CPC分类号: H01L29/872 , H01L23/3114 , H01L23/3192 , H01L23/49551 , H01L23/49562 , H01L23/5223 , H01L23/5228 , H01L23/544 , H01L23/562 , H01L24/05 , H01L24/06 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/29 , H01L24/32 , H01L24/33 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/85 , H01L27/0255 , H01L27/0629 , H01L27/067 , H01L27/0722 , H01L27/1021 , H01L28/10 , H01L28/20 , H01L28/24 , H01L28/40 , H01L29/0615 , H01L29/0619 , H01L29/0692 , H01L29/417 , H01L29/66136 , H01L29/861 , H01L29/8611 , H01L29/866 , H01L2223/54413 , H01L2223/54433 , H01L2223/54473 , H01L2223/54493 , H01L2224/02166 , H01L2224/0401 , H01L2224/04026 , H01L2224/04042 , H01L2224/05144 , H01L2224/05553 , H01L2224/05567 , H01L2224/05624 , H01L2224/05644 , H01L2224/06181 , H01L2224/11009 , H01L2224/11464 , H01L2224/13022 , H01L2224/131 , H01L2224/16225 , H01L2224/16245 , H01L2224/291 , H01L2224/32245 , H01L2224/45144 , H01L2224/48091 , H01L2224/48247 , H01L2224/48463 , H01L2224/73253 , H01L2224/73265 , H01L2224/85205 , H01L2224/94 , H01L2924/00014 , H01L2924/10253 , H01L2924/12032 , H01L2924/12035 , H01L2924/12036 , H01L2924/12042 , H01L2924/13091 , H01L2924/14 , H01L2924/15788 , H01L2924/181 , H01L2924/30107 , H01L2924/00012 , H01L2924/014 , H01L2224/11 , H01L2924/00 , H01L2224/45015 , H01L2924/207
摘要: A chip part includes a substrate, an element formed on the substrate, and an electrode formed on the substrate. A recess and/or projection expressing information related to the element is formed at a peripheral edge portion of the substrate.
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公开(公告)号:US20180352689A1
公开(公告)日:2018-12-06
申请号:US15990712
申请日:2018-05-28
发明人: Risto Tuominen
CPC分类号: H05K9/0081 , H01L24/19 , H01L24/20 , H01L2224/04105 , H01L2224/20 , H01L2224/2518 , H01L2224/32225 , H01L2224/32245 , H01L2224/92144 , H01L2924/01002 , H01L2924/01003 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01023 , H01L2924/01024 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01043 , H01L2924/01047 , H01L2924/01052 , H01L2924/0106 , H01L2924/01061 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/07802 , H01L2924/12042 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/30107 , H01L2924/3025 , H05K1/0218 , H05K1/185 , H05K2201/0723 , H05K2201/09318 , H05K2201/10674 , H01L2924/00
摘要: An electronic module with EMI protection is disclosed. The electronic module comprises a component with contact terminals and conducting lines in a first wiring layer. There is also a dielectric between the component and the first wiring layer such that the component is embedded in the dielectric. Contact elements provide electrical connection between at least some of the contact terminals and at least some of the conducting lines. The electronic module also comprises a second wiring layer inside the dielectric. The second wiring layer comprises a conducting pattern that is at least partly located between the component and the first wiring layer and provides EMI protection between the component and the conducting lines.
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公开(公告)号:US20180247923A1
公开(公告)日:2018-08-30
申请号:US15967233
申请日:2018-04-30
申请人: ABB Schweiz AG
发明人: Samuel Hartmann , Ulrich Schlapbach
IPC分类号: H01L25/18 , H01L23/00 , H01L23/538 , H01L23/498
CPC分类号: H01L25/18 , H01L23/49811 , H01L23/49838 , H01L23/5381 , H01L24/05 , H01L24/06 , H01L24/48 , H01L24/49 , H01L25/072 , H01L2224/0603 , H01L2224/48137 , H01L2224/48139 , H01L2224/48227 , H01L2224/4846 , H01L2224/49111 , H01L2224/49175 , H01L2224/49431 , H01L2224/49433 , H01L2924/00014 , H01L2924/10161 , H01L2924/1203 , H01L2924/13055 , H01L2924/13091 , H01L2924/15787 , H01L2924/19107 , H01L2924/30107 , H01L2224/45099 , H01L2224/05599 , H01L2924/00012
摘要: A semiconductor module, comprises a substrate plate; a semiconductor switch chip and a diode chip attached to a collector conductor on the substrate plate, wherein the diode chip is electrically connected antiparallel to the semiconductor switch chip; wherein the semiconductor switch chip is electrically connected via bond wires to an emitter conductor on the substrate plate providing a first emitter current path, which emitter conductor is arranged oppositely to the semiconductor switch chip with respect to the diode chip; wherein a gate electrode of the semiconductor switch chip is electrically connected via a bond wire to a gate conductor on the substrate plate providing a gate current path, which gate conductor is arranged oppositely to the semiconductor switch chip with respect to the diode chip; and wherein a protruding area of the emitter conductor runs besides the diode chip towards the first semiconductor switch chip and the first semiconductor switch chip is directly connected via a bond wire with the protruding area providing an additional emitter current path running at least partially along the gate current path. The semiconductor switch chip is a first semiconductor switch chip and the diode chip is a first diode chip, which are arranged in a first row. The semiconductor module comprises further a second row of a second semiconductor switch chip and a second diode chip attached to the collector conductor, wherein the diode chip of each row is electrically connected antiparallel to the semiconductor switch chip of the same row and the first and second rows are electrically connected in parallel. The first semiconductor switch chip is arranged besides the second diode chip and the second semiconductor chip is arranged besides the first diode chip.
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公开(公告)号:US20180190636A1
公开(公告)日:2018-07-05
申请号:US15738167
申请日:2016-06-28
发明人: Yasushige MUKUNOKI , Yoshiko TAMADA
IPC分类号: H01L25/18 , H01L23/538 , H01L23/498 , H01L23/00
CPC分类号: H01L25/18 , H01L23/367 , H01L23/49811 , H01L23/49838 , H01L23/5386 , H01L24/08 , H01L24/48 , H01L25/07 , H01L2224/0603 , H01L2224/08054 , H01L2224/08055 , H01L2224/48227 , H01L2224/49113 , H01L2924/12031 , H01L2924/1305 , H01L2924/13055 , H01L2924/13091 , H01L2924/1425 , H01L2924/30107 , H02M7/003 , H02M7/48 , H02M7/5387
摘要: A power semiconductor module including a positive-side switching device and a positive-side diode device which are mounted on a positive-side conductive pattern, and a negative-side switching device and a negative-side diode device which are mounted on an output-side conductive pattern. When an insulating substrate is viewed in plan view, the positive-side diode device and the negative-side diode device are disposed between the positive-side switching device and the negative-side switching device, and the negative-side diode device is disposed closer to the positive-side switching device than the positive-side diode device is.
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公开(公告)号:US10008457B2
公开(公告)日:2018-06-26
申请号:US15296627
申请日:2016-10-18
发明人: Richard Scott Burton , Karel Ptacek
CPC分类号: H01L23/645 , H01F2019/085 , H01L23/5227 , H01L23/66 , H01L24/09 , H01L24/48 , H01L24/49 , H01L2223/6611 , H01L2223/6655 , H01L2224/04042 , H01L2224/4813 , H01L2224/49175 , H01L2924/00014 , H01L2924/1421 , H01L2924/30105 , H01L2924/30107 , H01L2224/45099
摘要: Coupled resonators for galvanically isolated signaling between integrated circuit modules. An illustrative multi-module integrated circuit comprises: a transmitter in a first module, the transmitter providing a modulated carrier signal; a receiver in a second module demodulating the modulated carrier signal; and a galvanically isolated signaling path that includes: a first integrated resonator in the first module and a second integrated resonator in the second module, the first and second integrated resonators being resonantly coupled to convey the modulated carrier signal from the transmitter to the receiver. An illustrative embodiment of a method for providing an integrated circuit with a connection terminal for galvanically isolated signaling comprises: equipping the integrated circuit with a transmitter or receiver of a modulated carrier signal; connecting a transfer conductor to the connection terminal; and resonantly coupling the transmitter or receiver to a transfer conductor to convey the modulated carrier signal between the transfer conductor and the transmitter or receiver.
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公开(公告)号:US09955581B2
公开(公告)日:2018-04-24
申请号:US14992011
申请日:2016-01-10
申请人: MEDIATEK INC.
发明人: Nan-Jang Chen , Yau-Wai Wong
CPC分类号: H05K1/18 , H01L23/3185 , H01L23/49503 , H01L23/49524 , H01L23/49531 , H01L23/49541 , H01L23/49548 , H01L23/49551 , H01L23/49558 , H01L2224/32245 , H01L2224/48095 , H01L2224/48247 , H01L2224/48257 , H01L2224/49109 , H01L2224/49171 , H01L2224/73265 , H01L2924/181 , H01L2924/19107 , H01L2924/30107 , H01L2924/3011 , H01L2924/30111 , H02H9/046 , H05K1/0216 , H05K1/0245 , H01L2924/00 , H01L2924/00014 , H01L2924/00012
摘要: A printed circuit board (PCB) assembly includes a PCB having a core substrate, a plurality of conductive traces on a first surface of the PCB, and a ground layer on the second surface of the PCB. The conductive traces comprise a pair of differential signal traces. An intervening reference trace is disposed between the differential signal traces. A connector is disposed at one end of the plurality of conductive traces. A semiconductor package is mounted on the first surface at the other end of the plurality of conductive traces.
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19.
公开(公告)号:US09911703B2
公开(公告)日:2018-03-06
申请号:US15331115
申请日:2016-10-21
发明人: Olivier Lembeye , Damon G. Holmes , Ning Zhu
IPC分类号: H03F3/191 , H01L23/66 , H01L23/00 , H01L23/495 , H01L23/522 , H01L23/528 , H03F3/19
CPC分类号: H01L23/66 , H01L23/49562 , H01L23/49589 , H01L23/5227 , H01L23/528 , H01L23/645 , H01L24/48 , H01L24/49 , H01L24/85 , H01L2223/6611 , H01L2223/6655 , H01L2223/6672 , H01L2224/04042 , H01L2224/05552 , H01L2224/05553 , H01L2224/291 , H01L2224/2919 , H01L2224/32245 , H01L2224/48091 , H01L2224/48106 , H01L2224/48137 , H01L2224/48195 , H01L2224/48247 , H01L2224/48265 , H01L2224/49052 , H01L2224/49113 , H01L2224/49175 , H01L2224/73265 , H01L2224/83805 , H01L2224/8384 , H01L2924/00014 , H01L2924/1304 , H01L2924/1305 , H01L2924/13091 , H01L2924/1421 , H01L2924/19011 , H01L2924/19041 , H01L2924/19042 , H01L2924/19105 , H01L2924/19107 , H01L2924/30107 , H03F1/565 , H03F3/19 , H03F3/195 , H03F2200/222 , H03F2200/387 , H03F2200/391 , H03F2200/402 , H03F2200/451 , H03F2200/75 , H03F2203/21103 , H03F2203/21139 , H01L2924/014 , H01L2924/00 , H01L2224/45099 , H01L2224/05599
摘要: A packaged RF amplifier device includes a transistor and an output circuit. The transistor includes a control terminal and first and second current carrying terminals. The output circuit is coupled between the first current carrying terminal and an output lead. The output circuit includes first and second inductive elements coupled in series. The first inductive element, which may be a first bondwire array or an integrated inductance, is coupled between the first current carrying terminal and a node. The second inductive element, which includes a second bondwire array, is coupled between the node and the output lead. The device also includes a shunt circuit with a shunt capacitor and a third bondwire array coupled between the first current carrying terminal and the shunt capacitor. The first and second inductive elements and the third bondwire array are configured to have a desired mutual inductance.
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公开(公告)号:US09899283B2
公开(公告)日:2018-02-20
申请号:US15599626
申请日:2017-05-19
申请人: ABB Schweiz AG , Audi AG
发明人: Didier Cottet , Felix Traub
CPC分类号: H01L23/142 , H01L23/24 , H01L23/5386 , H01L24/06 , H01L24/48 , H01L24/49 , H01L25/072 , H01L25/18 , H01L2224/0603 , H01L2224/49111 , H01L2224/49113 , H01L2224/49175 , H01L2924/1304 , H01L2924/19107 , H01L2924/30107 , H02M7/003
摘要: A power module providing a half bridge comprises at least one substrate and an inner metallization area, two intermediate metallization areas and two outer metallization areas, each of which extends in a longitudinal direction of the at least one substrate; wherein the two intermediate metallization areas are arranged besides the inner metallization area with respect to a cross direction of the at least one substrate and each outer metallization area is arranged beside one of the two intermediate metallization areas with respect to the cross direction; wherein the power module comprises two inner sets of semiconductor switches, each inner set of semiconductor switches bonded to an intermediate metallization area and electrically connected to the inner metallization area, such that the inner sets of semiconductor switches form a first arm of the half bridge; wherein the power module comprises two outer sets of semiconductor switches, each outer set of semiconductor switches bonded to an outer metallization area and electrically connected to an intermediate metallization area, such that the outer sets of semiconductor switches form a second arm of the half bridge.
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