High voltage capacitor and method

    公开(公告)号:US10411086B2

    公开(公告)日:2019-09-10

    申请号:US14663587

    申请日:2015-03-20

    IPC分类号: H01L49/02 H01L27/08

    摘要: In accordance with an embodiment, a method of manufacturing an electrical component that may include a high voltage capacitor that includes providing a semiconductor material of a second conductivity type in which first doped region of a first conductivity type is formed. A plurality of doped regions of the first conductivity type and a plurality of doped regions of the second conductivity type are formed in the first doped region. A first p-n junction is formed between first doped regions of the first and second conductivity types and a second p-n junction is formed between second doped regions of the first and second conductivity types. A metallization system is formed above the doped regions so that capacitors are formed by a parallel connection of a first metal layer to a polysilicon layer and the first metal layer to a second metal layer.

    Receiver for resonance-coupled signaling

    公开(公告)号:US09954523B1

    公开(公告)日:2018-04-24

    申请号:US15296660

    申请日:2016-10-18

    摘要: An illustrative integrated circuit configured for galvanically isolated signaling includes a receiver having: a detector module coupled to receive a differential signal from terminals of a transformer secondary, the detector module responsively presenting an impedance that varies based on a magnitude of the differential signal; a biasing module that converts the detector module impedance to a response signal; and a comparator module that compares the response signal to a reference signal to obtain a detection signal indicative of oscillation in the differential signal. A method of receiving a pulse modulated alternating current (AC) signal from a resonantly-coupled signaling path comprises: supplying balanced quiescent currents from a cross-coupled FET pair in a common gate amplifier configuration thereby obtaining an impedance that varies based on an AC signal magnitude; converting the impedance into a response signal; and comparing the response signal to a reference signal to obtain a detection signal representing pulses in the differential AC signal.

    High voltage capacitor and method

    公开(公告)号:US11018216B2

    公开(公告)日:2021-05-25

    申请号:US16450036

    申请日:2019-06-24

    IPC分类号: H01L49/02 H01L27/08

    摘要: In accordance with an embodiment, an electrical element includes a first portion of a first dielectric material between a first portion of a first electrical conductor and a first portion of a second electrical conductor and a second portion of the first dielectric material between a second portion of the first electrical conductor and a first portion of a third electrical conductor. In accordance with another embodiment, an electrical component has a plurality of dopant regions formed in a semiconductor material, where the dopant regions include a plurality of dopant regions formed in a dopant region of the same conductivity type. A plurality of dopant regions of an opposite conductivity type are formed in corresponding dopant regions of the first conductivity type. A metallization system is formed over the semiconductor material, where a portion of the metallization system contacts the semiconductor material.

    Electrostatic discharge (ESD) robust transistors and related methods

    公开(公告)号:US10692853B2

    公开(公告)日:2020-06-23

    申请号:US14852912

    申请日:2015-09-14

    摘要: An electrostatic discharge robust semiconductor transistor (transistor) includes a semiconductor substrate of a first conductivity type, a substrate contact region of the first conductivity type coupled with the semiconductor substrate, a source region of a second conductivity type, a channel region of the second conductivity type, a gate region of the first conductivity type, a drain region having a first drain region of the first conductivity type and a second drain region of the second conductivity type, and an electrical conductor coupled over the second drain region and a portion of the first drain region. A portion of the first drain region not covered by the electrical conductor forms a resistive electrical ballast region configured to protect the transistor from electrostatic discharge (ESD) induced voltage pulses. In implementations the transistor includes a silicon controlled rectifier (SCR) junction field effect transistor (SCR JFET) or a laterally diffused metal-oxide semiconductor (SCR LDMOS).

    HIGH VOLTAGE CAPACITOR AND METHOD
    6.
    发明申请
    HIGH VOLTAGE CAPACITOR AND METHOD 审中-公开
    高电压电容器及方法

    公开(公告)号:US20150287774A1

    公开(公告)日:2015-10-08

    申请号:US14663587

    申请日:2015-03-20

    CPC分类号: H01L28/60 H01L27/0805

    摘要: In accordance with an embodiment, an electrical element includes a first portion of a first dielectric material between a first portion of a first electrical conductor and a first portion of a second electrical conductor and a second portion of the first dielectric material between a second portion of the first electrical conductor and a first portion of a third electrical conductor. In accordance with another embodiment, a method includes forming a first electrically conductive structure over a first portion of the first layer of dielectric material and forming a second electrically conductive structure over a second portion of the first layer of dielectric material. A second layer of dielectric material is formed over the first electrically conductive structure and a third electrically conductive structure over the second layer of dielectric material, wherein the third electrically conductive structure is over portions of the first and second electrically conductive structures.

    摘要翻译: 根据一个实施例,电气元件包括在第一电导体的第一部分和第二电导体的第一部分之间的第一介电材料的第一部分和第一电介质材料的第二部分之间的第二部分 第一电导体和第三电导体的第一部分。 根据另一个实施例,一种方法包括在第一介电材料层的第一部分上形成第一导电结构,并在第一介电材料层的第二部分上形成第二导电结构。 第二层电介质材料形成在第一导电结构之上,在第二绝缘材料层上形成第三导电结构,其中第三导电结构在第一和第二导电结构的部分之上。